<div style="line-height:1.7;color:#000000;font-size:14px;font-family:arial"><DIV>@Yuvaraj, Jason means all of m1 is uninitialize before instruction execute, you said it is initialize after.</DIV>
<DIV>see Intel doc for palignr, the register m1 is src and dest, it is logic problem, but it save a mov instruction and work fine.</DIV>
<DIV> </DIV>At 2014-01-17 14:42:31,"Yuvaraj Venkatesh" <yuvaraj@multicorewareinc.com> wrote:<BR>
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<DIV><SPAN style="FONT-SIZE: 12px; FONT-FAMILY: arial,sans-serif">Only the last pixel got the dependency of m1(uninitialized), anyway that particular pixel was not used anywhere on the code.</SPAN><BR></DIV>
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<DIV><FONT face="arial, sans-serif">Moreover psrldq has higher latency than the palignr and also need to use additional mov instruction.</FONT></DIV></DIV>
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<DIV class="gmail_quote">On Fri, Jan 17, 2014 at 12:08 PM, chen <SPAN dir="ltr"><<A href="mailto:chenm003@163.com" target="_blank">chenm003@163.com</A>></SPAN> wrote:<BR>
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<DIV>At 2014-01-17 14:00:55,"Jason Garrett-Glaser" <<A href="mailto:jason@x264.com" target="_blank">jason@x264.com</A>> wrote:
<DIV class="im"><BR>>+ movu m0, [r2 + 1] ; [16 15 14 13<BR>>12 11 10 9 8 7 6 5 4 3 2 1]<BR>>+ palignr m1, m0, 1 ; [x 16 15 14<BR>>13 12 11 10 9 8 7 6 5 4 3 2]<BR>><BR>>Shouldn't this be pslrdq or similar? The dependency on uninitialized<BR>>registers is a bit weird too...<BR></DIV></DIV>
<DIV>This algorithm is suggest by me, the psrldq can't move register, we</DIV>
<DIV>have to wasting some instruction to do it.</DIV>
<DIV>Of course, we have a restrict use uninitialize value on other instruction.</DIV>
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