<html>
<head>
<meta content="text/html; charset=windows-1252"
http-equiv="Content-Type">
</head>
<body text="#000000" bgcolor="#FFFFFF">
<div class="moz-cite-prefix">Testing fails when movzx is removed so
I left it in.<br>
<br>
On 02/23/2015 08:00 PM, chen wrote:<br>
</div>
<blockquote
cite="mid:69de238.2b3.14bb9be1987.Coremail.chenm003@163.com"
type="cite">
<div
style="line-height:1.7;color:#000000;font-size:14px;font-family:arial">
<div><br>
</div>
<pre>
At 2015-02-24 00:24:27,<a class="moz-txt-link-abbreviated" href="mailto:dtyx265@gmail.com">dtyx265@gmail.com</a> wrote:
># HG changeset patch
># User David T Yuen <a class="moz-txt-link-rfc2396E" href="mailto:dtyx265@gmail.com"><dtyx265@gmail.com></a>
># Date 1424708564 28800
># Node ID 60db6870a07261ee2acf5556ddf34dae051fa5c9
># Parent c2eb94770f9b98d5bc5cf0e96d635e26c01ca5c6
>asm: intrapred dc4 sse2 high bit
>
>This replaces c code for systems using ssse3 to sse2 processors
>The code is backported from intrapred dc4 sse4 high bit
>
>./test/TestBench --testbench intrapred
>Testing only harnesses that match name <intrapred>
>Using random seed 54EB5220 16bpp
>Testing primitives: SSE2
>Testing primitives: SSE3
>
>Test performance improvement with full optimizations
>== intrapred primitives ==
>intra_dc_4x4[f=0] 1.22x 215.61 262.36
>intra_dc_4x4[f=1] 1.06x 452.61 477.60
>
>diff -r c2eb94770f9b -r 60db6870a072 source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp Mon Feb 23 07:46:15 2015 -0800
>+++ b/source/common/x86/asm-primitives.cpp Mon Feb 23 08:22:44 2015 -0800
>@@ -862,6 +862,7 @@
> ALL_LUMA_TU_S(ssd_s, pixel_ssd_s_, sse2);
> ALL_LUMA_TU_S(calcresidual, getResidual, sse2);
> ALL_LUMA_TU_S(transpose, transpose, sse2);
>+ p.cu[BLOCK_4x4].intra_pred[DC_IDX] = x265_intra_pred_dc4_sse2;
>
> p.cu[BLOCK_4x4].sse_ss = x265_pixel_ssd_ss_4x4_mmx2;
> ALL_LUMA_CU(sse_ss, pixel_ssd_ss, sse2);
>diff -r c2eb94770f9b -r 60db6870a072 source/common/x86/intrapred16.asm
>--- a/source/common/x86/intrapred16.asm Mon Feb 23 07:46:15 2015 -0800
>+++ b/source/common/x86/intrapred16.asm Mon Feb 23 08:22:44 2015 -0800
>@@ -65,6 +65,8 @@
> pw_planar16_1: dw 15, 15, 15, 15, 15, 15, 15, 15
> pd_planar32_1: dd 31, 31, 31, 31
>
>+INT4: dw 4, 0, 0, 0, 0, 0, 0, 0
rename
> const planar32_table
> %assign x 31
> %rep 8
>@@ -99,6 +101,73 @@
> ;-----------------------------------------------------------------------------------
> ; void intra_pred_dc(pixel* dst, intptr_t dstStride, pixel* above, int, int filter)
> ;-----------------------------------------------------------------------------------
>+INIT_XMM sse2
>+cglobal intra_pred_dc4, 5,6,2
>+ lea r3, [r2 + 18]
>+ add r2, 2
>+
>+ movh m0, [r3] ; sumAbove
>+ movh m1, [r2] ; sumLeft
>+
>+ paddw m0, m1
>+ pshufd m1, m0, 0xFD
>+ paddw m0, m1
>+ pshuflw m1, m0, 1
>+ paddw m0, m1
>+
>+ test r4d, r4d
>+
>+ paddw m0, [INT4]
>+ psraw m0, 3
>+ movd r4d, m0 ; r4d = dc_val
>+ movzx r4d, r4w
the input less than 12-bits, so the dynamic for 8 of 12-bits are 15-bits, we didn't need zero-extend here
>+ pshuflw m0, m0, 0 ; m0 = word [dc_val ...]
>+
>+ ; store DC 4x4
>+ movq [r0], m0
>+ movq [r0 + r1 * 2], m0
>+ movq [r0 + r1 * 4], m0
>+ lea r5, [r0 + r1 * 4]
>+ movq [r5 + r1 * 2], m0
>+
>+ ; do DC filter
>+ jz .end
>+ lea r5d, [r4d * 2 + 2] ; r5d = DC * 2 + 2
>+ add r4d, r5d ; r4d = DC * 3 + 2
>+ movd m0, r4d
>+ pshuflw m0, m0, 0 ; m0 = pixDCx3
>+
>+ ; filter top
>+ movu m1, [r2]
you use low 8-bytes only
>+ paddw m1, m0
>+ psraw m1, 2
>+ movq [r0], m1 ; overwrite top-left pixel, we will update it later
>+
>+ ; filter top-left
>+ movzx r4d, word [r3]
>+ add r5d, r4d
>+ movzx r4d, word [r2]
>+ add r4d, r5d
>+ shr r4d, 2
>+ mov [r0], r4w
>+
>+ ; filter left
>+ lea r0, [r0 + r1 * 2]
>+ movu m1, [r3 + 2]
>+ paddw m1, m0
>+ psraw m1, 2
>+ movd r3d, m1
>+ mov [r0], r3w
>+ shr r3d, 16
>+ mov [r0 + r1 * 2], r3w
>+ pextrw r3d, m1, 2
>+ mov [r0 + r1 * 4], r3w
>+.end:
>+ RET
>+
>+;-----------------------------------------------------------------------------------
>+; void intra_pred_dc(pixel* dst, intptr_t dstStride, pixel* above, int, int filter)
>+;-----------------------------------------------------------------------------------
> INIT_XMM sse4
> cglobal intra_pred_dc4, 5,6,2
> lea r3, [r2 + 18]
>_______________________________________________
>x265-devel mailing list
><a class="moz-txt-link-abbreviated" href="mailto:x265-devel@videolan.org">x265-devel@videolan.org</a>
><a class="moz-txt-link-freetext" href="https://mailman.videolan.org/listinfo/x265-devel">https://mailman.videolan.org/listinfo/x265-devel</a>
</pre>
</div>
<br>
<fieldset class="mimeAttachmentHeader"></fieldset>
<br>
<pre wrap="">_______________________________________________
x265-devel mailing list
<a class="moz-txt-link-abbreviated" href="mailto:x265-devel@videolan.org">x265-devel@videolan.org</a>
<a class="moz-txt-link-freetext" href="https://mailman.videolan.org/listinfo/x265-devel">https://mailman.videolan.org/listinfo/x265-devel</a>
</pre>
</blockquote>
<br>
</body>
</html>