<div dir="ltr">Please ignore, need to add performance data in commit message.<div><br></div><div><br></div><div>Regards,</div><div>Praveen</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Mar 12, 2015 at 6:50 PM, <span dir="ltr"><<a href="mailto:praveen@multicorewareinc.com" target="_blank">praveen@multicorewareinc.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"># HG changeset patch<br>
# User Praveen Tiwari <<a href="mailto:praveen@multicorewareinc.com">praveen@multicorewareinc.com</a>><br>
# Date 1426165765 -19800<br>
# Node ID e4204ceeb011a009455cde620c346729d80ac822<br>
# Parent d012e125bdb1299ba29b9c0680931e148981a42e<br>
asm: intra_pred_ang16_25<br>
<br>
diff -r d012e125bdb1 -r e4204ceeb011 source/common/x86/asm-primitives.cpp<br>
--- a/source/common/x86/asm-primitives.cpp Thu Mar 12 18:40:23 2015 +0530<br>
+++ b/source/common/x86/asm-primitives.cpp Thu Mar 12 18:39:25 2015 +0530<br>
@@ -1504,6 +1504,7 @@<br>
<a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_8x8].intra_pred[12] = x265_intra_pred_ang8_12_avx2;<br>
<a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_8x8].intra_pred[24] = x265_intra_pred_ang8_24_avx2;<br>
<a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_8x8].intra_pred[11] = x265_intra_pred_ang8_11_avx2;<br>
+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_16x16].intra_pred[25] = x265_intra_pred_ang16_25_avx2;<br>
<br>
// copy_sp primitives<br>
<a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_16x16].copy_sp = x265_blockcopy_sp_16x16_avx2;<br>
diff -r d012e125bdb1 -r e4204ceeb011 source/common/x86/intrapred.h<br>
--- a/source/common/x86/intrapred.h Thu Mar 12 18:40:23 2015 +0530<br>
+++ b/source/common/x86/intrapred.h Thu Mar 12 18:39:25 2015 +0530<br>
@@ -182,6 +182,7 @@<br>
void x265_intra_pred_ang8_12_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);<br>
void x265_intra_pred_ang8_24_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);<br>
void x265_intra_pred_ang8_11_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);<br>
+void x265_intra_pred_ang16_25_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);<br>
void x265_all_angs_pred_4x4_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);<br>
void x265_all_angs_pred_8x8_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);<br>
void x265_all_angs_pred_16x16_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);<br>
diff -r d012e125bdb1 -r e4204ceeb011 source/common/x86/intrapred8.asm<br>
--- a/source/common/x86/intrapred8.asm Thu Mar 12 18:40:23 2015 +0530<br>
+++ b/source/common/x86/intrapred8.asm Thu Mar 12 18:39:25 2015 +0530<br>
@@ -113,6 +113,17 @@<br>
db 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2<br>
db 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24<br>
<br>
+ALIGN 32<br>
+c_ang16_mode_25: db 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28<br>
+ db 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24<br>
+ db 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20<br>
+ db 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16<br>
+ db 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12<br>
+ db 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8<br>
+ db 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4<br>
+ db 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0<br>
+<br>
+ALIGN 32<br>
;; (blkSize - 1 - x)<br>
pw_planar4_0: dw 3, 2, 1, 0, 3, 2, 1, 0<br>
pw_planar4_1: dw 3, 3, 3, 3, 3, 3, 3, 3<br>
@@ -10368,6 +10379,47 @@<br>
movhps [r0 + r3], xm2<br>
RET<br>
<br>
+%macro INTRA_PRED_ANG16_MC0 3<br>
+ pmaddubsw m3, m1, [r4 + %3 * mmsize]<br>
+ pmulhrsw m3, m0<br>
+ pmaddubsw m4, m2, [r4 + %3 * mmsize]<br>
+ pmulhrsw m4, m0<br>
+ packuswb m3, m4<br>
+ movu [%1], xm3<br>
+ vextracti128 xm4, m3, 1<br>
+ movu [%2], xm4<br>
+%endmacro<br>
+<br>
+%macro INTRA_PRED_ANG16_25 1<br>
+ INTRA_PRED_ANG16_MC0 r0, r0 + r1, %1<br>
+ INTRA_PRED_ANG16_MC0 r0 + 2 * r1, r0 + r3, (%1 + 1)<br>
+%endmacro<br>
+<br>
+INIT_YMM avx2<br>
+cglobal intra_pred_ang16_25, 3, 5, 5<br>
+ mova m0, [pw_1024]<br>
+<br>
+ vbroadcasti128 m1, [r2]<br>
+ pshufb m1, [intra_pred_shuff_0_8]<br>
+ vbroadcasti128 m2, [r2 + 8]<br>
+ pshufb m2, [intra_pred_shuff_0_8]<br>
+<br>
+ lea r3, [3 * r1]<br>
+ lea r4, [c_ang16_mode_25]<br>
+<br>
+ INTRA_PRED_ANG16_25 0<br>
+<br>
+ lea r0, [r0 + 4 * r1]<br>
+ INTRA_PRED_ANG16_25 2<br>
+<br>
+ lea r0, [r0 + 4 * r1]<br>
+ INTRA_PRED_ANG16_25 4<br>
+<br>
+ lea r0, [r0 + 4 * r1]<br>
+ INTRA_PRED_ANG16_25 6<br>
+ RET<br>
+<br>
+<br>
<br>
INIT_YMM avx2<br>
cglobal intra_pred_ang8_12, 3, 5, 5<br>
</blockquote></div><br></div>