<div dir="ltr"><span style="font-size:12.8000001907349px">Please ignore duplicate patch (second), send my mistake.</span><br></div><div class="gmail_extra"><br clear="all"><div><div class="gmail_signature"><div dir="ltr">Regards,<div>Praveen</div></div></div></div>
<br><div class="gmail_quote">On Fri, Mar 27, 2015 at 10:41 AM, <span dir="ltr"><<a href="mailto:praveen@multicorewareinc.com" target="_blank">praveen@multicorewareinc.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5"># HG changeset patch<br>
# User Praveen Tiwari <<a href="mailto:praveen@multicorewareinc.com">praveen@multicorewareinc.com</a>><br>
# Date 1427360000 -19800<br>
# Thu Mar 26 14:23:20 2015 +0530<br>
# Branch stable<br>
# Node ID 39c139322fde1f8c62545fd8bbed9cc8198e540c<br>
# Parent 24bdb3e594556ca6e12ee9dae58100a6bd115d2a<br>
asm: intra_pred_ang32_25 improved by ~53% over SSE4<br>
<br>
AVX2:<br>
intra_ang_32x32[25] 23.11x 1293.83 29904.12<br>
<br>
SSE4:<br>
intra_ang_32x32[25] 10.31x 2759.33 28451.26<br>
<br>
diff -r 24bdb3e59455 -r 39c139322fde source/common/x86/asm-primitives.cpp<br>
--- a/source/common/x86/asm-primitives.cpp Thu Mar 26 13:20:04 2015 +0530<br>
+++ b/source/common/x86/asm-primitives.cpp Thu Mar 26 14:23:20 2015 +0530<br>
@@ -1643,6 +1643,7 @@<br>
<a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_32x32].intra_pred[31] = x265_intra_pred_ang32_31_avx2;<br>
<a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_32x32].intra_pred[32] = x265_intra_pred_ang32_32_avx2;<br>
<a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_32x32].intra_pred[33] = x265_intra_pred_ang32_33_avx2;<br>
+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_32x32].intra_pred[25] = x265_intra_pred_ang32_25_avx2;<br>
<br>
// copy_sp primitives<br>
<a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_16x16].copy_sp = x265_blockcopy_sp_16x16_avx2;<br>
diff -r 24bdb3e59455 -r 39c139322fde source/common/x86/intrapred.h<br>
--- a/source/common/x86/intrapred.h Thu Mar 26 13:20:04 2015 +0530<br>
+++ b/source/common/x86/intrapred.h Thu Mar 26 14:23:20 2015 +0530<br>
@@ -213,6 +213,7 @@<br>
void x265_intra_pred_ang32_31_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);<br>
void x265_intra_pred_ang32_32_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);<br>
void x265_intra_pred_ang32_33_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);<br>
+void x265_intra_pred_ang32_25_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);<br>
void x265_all_angs_pred_4x4_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);<br>
void x265_all_angs_pred_8x8_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);<br>
void x265_all_angs_pred_16x16_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);<br>
diff -r 24bdb3e59455 -r 39c139322fde source/common/x86/intrapred8.asm<br>
--- a/source/common/x86/intrapred8.asm Thu Mar 26 13:20:04 2015 +0530<br>
+++ b/source/common/x86/intrapred8.asm Thu Mar 26 14:23:20 2015 +0530<br>
@@ -407,6 +407,26 @@<br>
db 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0<br>
<br>
<br>
+<br>
+ALIGN 32<br>
+c_ang32_mode_25: db 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28<br>
+ db 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24<br>
+ db 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20<br>
+ db 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16<br>
+ db 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12<br>
+ db 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8<br>
+ db 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4<br>
+ db 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0<br>
+ db 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28<br>
+ db 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24<br>
+ db 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20<br>
+ db 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16<br>
+ db 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12<br>
+ db 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8<br>
+ db 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4<br>
+ db 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0<br>
+<br>
+<br>
ALIGN 32<br>
;; (blkSize - 1 - x)<br>
pw_planar4_0: dw 3, 2, 1, 0, 3, 2, 1, 0<br>
@@ -14108,5 +14128,155 @@<br>
vpermq m6, m6, 11011000b<br>
movu [r0 + r3], m6<br>
RET<br>
+<br>
+INIT_YMM avx2<br>
+cglobal intra_pred_ang32_25, 3, 5, 11<br>
+ mova m0, [pw_1024]<br>
+ mova m1, [intra_pred_shuff_0_8]<br>
+ lea r3, [3 * r1]<br>
+ lea r4, [c_ang32_mode_25]<br>
+<br>
+ ;row [0, 1]<br>
+ vbroadcasti128 m2, [r2 + 0]<br>
+ pshufb m2, m1<br>
+ vbroadcasti128 m3, [r2 + 8]<br>
+ pshufb m3, m1<br>
+ vbroadcasti128 m4, [r2 + 16]<br>
+ pshufb m4, m1<br>
+ vbroadcasti128 m5, [r2 + 24]<br>
+ pshufb m5, m1<br>
+<br>
+ mova m10, [r4 + 0 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0], m7<br>
+ movu [r0 + r1], m6<br>
+<br>
+ ;row[2, 3]<br>
+ mova m10, [r4 + 1 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0 + 2 * r1], m7<br>
+ movu [r0 + r3], m6<br>
+<br>
+ ;row[4, 5]<br>
+ mova m10, [r4 + 2 * mmsize]<br>
+ lea r0, [r0 + 4 * r1]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0], m7<br>
+ movu [r0 + r1], m6<br>
+<br>
+ ;row[6, 7]<br>
+ mova m10, [r4 + 3 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0 + 2 * r1], m7<br>
+ movu [r0 + r3], m6<br>
+<br>
+ ;row[8, 9]<br>
+ add r4, 4 * mmsize<br>
+ lea r0, [r0 + 4 * r1]<br>
+ mova m10, [r4 + 0 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0], m7<br>
+ movu [r0 + r1], m6<br>
+<br>
+ ;row[10, 11]<br>
+ mova m10, [r4 + 1 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0 + 2 * r1], m7<br>
+ movu [r0 + r3], m6<br>
+<br>
+ ;row[12, 13]<br>
+ mova m10, [r4 + 2 * mmsize]<br>
+ lea r0, [r0 + 4 * r1]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0], m7<br>
+ movu [r0 + r1], m6<br>
+<br>
+ ;row[14, 15]<br>
+ mova m10, [r4 + 3 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0 + 2 * r1], m7<br>
+ movu [r0 + r3], m6<br>
+<br>
+ ;row[16, 17]<br>
+ movu xm2, [r2 - 1]<br>
+ pinsrb xm2, [r2 + 80], 0<br>
+ vinserti128 m2, m2, xm2, 1<br>
+ pshufb m2, m1<br>
+ vbroadcasti128 m3, [r2 + 7]<br>
+ pshufb m3, m1<br>
+ vbroadcasti128 m4, [r2 + 15]<br>
+ pshufb m4, m1<br>
+ vbroadcasti128 m5, [r2 + 23]<br>
+ pshufb m5, m1<br>
+<br>
+ add r4, 4 * mmsize<br>
+ lea r0, [r0 + 4 * r1]<br>
+ mova m10, [r4 + 0 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0], m7<br>
+ movu [r0 + r1], m6<br>
+<br>
+ ;row[18, 19]<br>
+ mova m10, [r4 + 1 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0 + 2 * r1], m7<br>
+ movu [r0 + r3], m6<br>
+<br>
+ ;row[20, 21]<br>
+ mova m10, [r4 + 2 * mmsize]<br>
+ lea r0, [r0 + 4 * r1]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0], m7<br>
+ movu [r0 + r1], m6<br>
+<br>
+ ;row[22, 23]<br>
+ mova m10, [r4 + 3 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0 + 2 * r1], m7<br>
+ movu [r0 + r3], m6<br>
+<br>
+ ;row[24, 25]<br>
+ add r4, 4 * mmsize<br>
+ lea r0, [r0 + 4 * r1]<br>
+ mova m10, [r4 + 0 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0], m7<br>
+ movu [r0 + r1], m6<br>
+<br>
+ ;row[26, 27]<br>
+ mova m10, [r4 + 1 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0 + 2 * r1], m7<br>
+ movu [r0 + r3], m6<br>
+<br>
+ ;row[28, 29]<br>
+ mova m10, [r4 + 2 * mmsize]<br>
+ lea r0, [r0 + 4 * r1]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0], m7<br>
+ movu [r0 + r1], m6<br>
+<br>
+ ;row[30, 31]<br>
+ mova m10, [r4 + 3 * mmsize]<br>
+<br>
+ INTRA_PRED_ANG32_CAL_ROW<br>
+ movu [r0 + 2 * r1], m7<br>
+ movu [r0 + r3], m6<br>
+ RET<br>
%endif<br>
<br>
</div></div></blockquote></div><br></div>