<div style="line-height:1.7;color:#000000;font-size:14px;font-family:arial"><div> </div><pre><br>At 2015-05-18 10:48:54,dtyx265@gmail.com wrote:
># HG changeset patch
># User David T Yuen <dtyx265@gmail.com>
># Date 1431912252 25200
># Node ID c2624b61f4c7d894616a7dc1e8a6cc1c0a506028
># Parent  72bba6b9e99739599d040000be62c7e02a3c8faa
>asm: interp_4tap_vert_ps_4xN sse2
>
>Converted vert_pp_4xN macro to also create ps primitives.  This replaces c code for ps with minimal impact on pp.
>
>64-bit
>
>./test/TestBench --testbench interp | grep vp | grep " 4x"
>chroma_vpp[  4x4] 2.10x       1005.00          2110.31
>chroma_vps[  4x4] 1.76x       927.49      1634.98
>chroma_vpp[  4x2] 2.17x       515.01      1117.32
>chroma_vps[  4x2] 1.72x       497.49      854.98
>chroma_vpp[  4x8] 2.28x       1928.24          4402.00
>chroma_vps[  4x8] 1.83x       1803.01          3294.14
>chroma_vpp[ 4x16]      2.30x       3782.50          8710.95
>chroma_vpp[  4x8] 2.28x       1927.50          4400.15
>chroma_vps[  4x8] 1.84x       1787.48          3294.45
>chroma_vpp[  4x4] 2.11x       1000.00          2109.98
>chroma_vps[  4x4] 1.77x       924.99      1634.97
>chroma_vpp[ 4x16]      2.30x       3782.50          8709.96
>chroma_vps[ 4x16]      1.90x       3519.99          6698.32
>chroma_vpp[ 4x32]      2.27x       7477.50          16995.56
>chroma_vpp[  4x4] 2.10x       1005.00          2109.98
>chroma_vps[  4x4] 1.76x       927.49      1634.98
>chroma_vpp[  4x8] 2.28x       1927.50          4400.14
>chroma_vps[  4x8] 1.83x       1787.48          3270.89
>chroma_vpp[ 4x16]      2.30x       3782.51          8709.96
>chroma_vps[ 4x16]      1.90x       3517.48          6697.70
>
>32-bit
>
>./test/TestBench --testbench interp | grep vp | grep " 4x"
>chroma_vpp[  4x4] 2.33x       1177.48          2747.42
>chroma_vps[  4x4] 2.47x       1092.47          2702.46
>chroma_vpp[  4x2] 2.44x       579.98      1414.90
>chroma_vps[  4x2] 2.41x       545.91      1314.92
>chroma_vpp[  4x8] 2.58x       2183.79          5640.24
>chroma_vps[  4x8] 2.08x       2020.00          4200.24
>chroma_vpp[ 4x16]      2.64x       4202.49          11097.51
>chroma_vpp[  4x8] 2.58x       2187.48          5640.61
>chroma_vps[  4x8] 2.06x       2019.08          4163.00
>chroma_vpp[  4x4] 2.37x       1159.99          2747.38
>chroma_vps[  4x4] 2.47x       1092.49          2702.42
>chroma_vpp[ 4x16]      2.64x       4207.48          11097.51
>chroma_vps[ 4x16]      2.07x       3887.50          8034.82
>chroma_vpp[ 4x32]      2.65x       8247.49          21867.51
>chroma_vpp[  4x4] 2.37x       1159.99          2747.42
>chroma_vps[  4x4] 2.48x       1088.74          2702.42
>chroma_vpp[  4x8] 2.58x       2187.48          5640.30
>chroma_vps[  4x8] 2.06x       2017.49          4162.46
>chroma_vpp[ 4x16]      2.64x       4202.49          11097.51
>chroma_vps[ 4x16]      2.07x       3889.43          8034.94
>
>diff -r 72bba6b9e997 -r c2624b61f4c7 source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp     Sun May 17 18:13:35 2015 -0700
>+++ b/source/common/x86/asm-primitives.cpp     Sun May 17 18:24:12 2015 -0700
>@@ -1451,7 +1451,15 @@
>         p.chroma[X265_CSP_I420].pu[CHROMA_420_2x4].filter_vps = x265_interp_4tap_vert_ps_2x4_sse2;
>         p.chroma[X265_CSP_I420].pu[CHROMA_420_2x8].filter_vps = x265_interp_4tap_vert_ps_2x8_sse2;
>         p.chroma[X265_CSP_I420].pu[CHROMA_420_4x2].filter_vps = x265_interp_4tap_vert_ps_4x2_sse2;
>+        p.chroma[X265_CSP_I420].pu[CHROMA_420_4x4].filter_vps = x265_interp_4tap_vert_ps_4x4_sse2;
>+        p.chroma[X265_CSP_I420].pu[CHROMA_420_4x8].filter_vps = x265_interp_4tap_vert_ps_4x8_sse2;
>         p.chroma[X265_CSP_I422].pu[CHROMA_422_2x16].filter_vps = x265_interp_4tap_vert_ps_2x16_sse2;
>+        p.chroma[X265_CSP_I422].pu[CHROMA_422_4x4].filter_vps = x265_interp_4tap_vert_ps_4x4_sse2;
>+        p.chroma[X265_CSP_I422].pu[CHROMA_422_4x8].filter_vps = x265_interp_4tap_vert_ps_4x8_sse2;
>+        p.chroma[X265_CSP_I422].pu[CHROMA_422_4x16].filter_vps = x265_interp_4tap_vert_ps_4x16_sse2;
>+        p.chroma[X265_CSP_I444].pu[LUMA_4x4].filter_vps = x265_interp_4tap_vert_ps_4x4_sse2;
>+        p.chroma[X265_CSP_I444].pu[LUMA_4x8].filter_vps = x265_interp_4tap_vert_ps_4x8_sse2;
>+        p.chroma[X265_CSP_I444].pu[LUMA_4x16].filter_vps = x265_interp_4tap_vert_ps_4x16_sse2;
> #if X86_64
>         p.chroma[X265_CSP_I420].pu[CHROMA_420_6x8].filter_vpp = x265_interp_4tap_vert_pp_6x8_sse2;
>         p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vpp = x265_interp_4tap_vert_pp_8x2_sse2;
>diff -r 72bba6b9e997 -r c2624b61f4c7 source/common/x86/ipfilter8.asm
>--- a/source/common/x86/ipfilter8.asm  Sun May 17 18:13:35 2015 -0700
>+++ b/source/common/x86/ipfilter8.asm  Sun May 17 18:24:12 2015 -0700
>@@ -1111,15 +1111,15 @@
>     FILTER_V2_W4_H4_sse2 ps

> ;-----------------------------------------------------------------------------
>-; void interp_4tap_vert_pp_%1x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
>-;-----------------------------------------------------------------------------
>-%macro FILTER_V4_W4_H4_sse2 1
>+; void interp_4tap_vert_%1_4x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
>+;-----------------------------------------------------------------------------
>+%macro FILTER_V4_W4_H4_sse2 2
> INIT_XMM sse2
> %if ARCH_X86_64
>-cglobal interp_4tap_vert_pp_4x%1, 4, 6, 9
>+cglobal interp_4tap_vert_%1_4x%2, 4, 6, 9
>     pxor        m8,        m8
> %else
>-cglobal interp_4tap_vert_pp_4x%1, 4, 6, 8
>+cglobal interp_4tap_vert_%1_4x%2, 4, 6, 8
> %endif

>     mov         r4d,       r4m
>@@ -1132,12 +1132,18 @@
>     movh        m0,        [tabw_ChromaCoeff + r4 * 8]
> %endif

>+%ifidn %1,pp
>     mova        m1,        [pw_32]
>+%elifidn %1,ps
>+    add         r3d,       r3d
>+    mova        m1,        [pw_2000]
>+%endif
>+
>     lea         r5,        [3 * r1]
>     punpcklqdq  m0,        m0

> %assign x 1
>-%rep %1/4
>+%rep %2/4
>     movd        m2,        [r0]
>     movd        m3,        [r0 + r1]
>     movd        m4,        [r0 + 2 * r1]
>@@ -1174,12 +1180,24 @@
>     pshuflw     m7,        m3,        q2301
>     pshufhw     m7,        m7,        q2301
>     paddw       m3,        m7
>+
>+%ifidn %1,pp
>     psrld       m2,        16
>     psrld       m3,        16
>     packssdw    m2,        m3
>-
>     paddw       m2,        m1
>     psraw       m2,        6
>+%elifidn %1,ps
>+    psrldq      m2,        2
>+    psrldq      m3,        2
>+    pshufd      m2,        m2, q3120
>+    pshufd      m3,        m3, q3120
>+    punpcklqdq  m2,        m3
>+
>+    psubw       m2,        m1
>+    movh        [r2],      m2
>+    movhps      [r2 + r3], m2
>+%endif

>     movd        m7,        [r0 + r1]

>@@ -1213,6 +1231,8 @@
>     pshuflw     m7,        m5,        q2301
>     pshufhw     m7,        m7,        q2301
>     paddw       m5,        m7
>+
>+%ifidn %1,pp
>     psrld       m4,        16
>     psrld       m5,        16
>     packssdw    m4,        m5
>@@ -1229,19 +1249,37 @@
>     movd        [r2],      m2
>     psrldq      m2,        4
>     movd        [r2 + r3], m2
>-
>-%if x < %1/4
>+%elifidn %1,ps
>+    psrldq      m4,        2
>+    psrldq      m5,        2
>+    pshufd      m4,        m4, q3120
>+    pshufd      m5,        m5, q3120
>+    punpcklqdq  m4,        m5
</pre><pre>same as last patch</pre><pre>>+    psubw       m4,        m1
>     lea         r2,        [r2 + 2 * r3]
</pre><pre>r4 is free, so this LEA can remove</pre><pre>>-%endif
>+    movh        [r2],      m4
>+    movhps      [r2 + r3], m4
>+%endif
>+
>+%if x < %2/4
>+    lea         r2,        [r2 + 2 * r3]
>+%endif
>+
> %assign x x+1
> %endrep
>     RET
>-%endmacro
>-
>-    FILTER_V4_W4_H4_sse2 4
>-    FILTER_V4_W4_H4_sse2 8
>-    FILTER_V4_W4_H4_sse2 16
>-    FILTER_V4_W4_H4_sse2 32
>+
>+%endmacro
>+
>+    FILTER_V4_W4_H4_sse2 pp, 4
>+    FILTER_V4_W4_H4_sse2 pp, 8
>+    FILTER_V4_W4_H4_sse2 pp, 16
>+    FILTER_V4_W4_H4_sse2 pp, 32
>+
>+    FILTER_V4_W4_H4_sse2 ps, 4
>+    FILTER_V4_W4_H4_sse2 ps, 8
>+    FILTER_V4_W4_H4_sse2 ps, 16
>+    FILTER_V4_W4_H4_sse2 ps, 32

> ;-----------------------------------------------------------------------------
> ;void interp_4tap_vert_pp_6x8(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
>diff -r 72bba6b9e997 -r c2624b61f4c7 source/common/x86/ipfilter8.h
>--- a/source/common/x86/ipfilter8.h    Sun May 17 18:13:35 2015 -0700
>+++ b/source/common/x86/ipfilter8.h    Sun May 17 18:24:12 2015 -0700
>@@ -917,6 +917,10 @@
> void x265_interp_4tap_vert_ps_2x8_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
> void x265_interp_4tap_vert_ps_2x16_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
> void x265_interp_4tap_vert_ps_4x2_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
>+void x265_interp_4tap_vert_ps_4x4_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
>+void x265_interp_4tap_vert_ps_4x8_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
>+void x265_interp_4tap_vert_ps_4x16_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
>+void x265_interp_4tap_vert_ps_4x32_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
> #ifdef X86_64
> void x265_interp_4tap_vert_pp_6x8_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
> void x265_interp_4tap_vert_pp_6x16_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
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</pre></div>