<div dir="ltr">Please ignore this patch, will send new patch with small correction<div><br></div><div>Regards</div><div>Sumalatha</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, May 18, 2015 at 11:54 AM, <span dir="ltr"><<a href="mailto:sumalatha@multicorewareinc.com" target="_blank">sumalatha@multicorewareinc.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"># HG changeset patch<br>
# User Sumalatha Polureddy<br>
# Date 1431930290 -19800<br>
# Mon May 18 11:54:50 2015 +0530<br>
# Node ID d80ab19fd99891aa657b7ebb8cd1b9a123f0f907<br>
# Parent 8592bf81d0848279fa79cd1487406cb516dffe99<br>
asm: avx2 code for sad_x3[16xN] for 10 bpp<br>
<br>
sse2:<br>
sad_x3[ 16x4] 2.93x 680.82 1996.91<br>
sad_x3[ 16x8] 3.03x 1266.26 3834.18<br>
sad_x3[16x12] 3.07x 1834.17 5631.97<br>
sad_x3[16x16] 3.06x 2413.24 7380.88<br>
sad_x3[16x32] 2.82x 5554.36 15654.50<br>
sad_x3[16x64] 2.80x 10161.18 28493.52<br>
<br>
avx2:<br>
sad_x3[ 16x4] 4.82x 404.45 1948.78<br>
sad_x3[ 16x8] 5.85x 634.65 3714.40<br>
sad_x3[16x12] 6.17x 885.30 5465.97<br>
sad_x3[16x16] 6.28x 1170.04 7350.87<br>
sad_x3[16x32] 5.34x 2909.76 15547.79<br>
sad_x3[16x64] 6.12x 5071.22 31043.80<br>
<br>
diff -r 8592bf81d084 -r d80ab19fd998 source/common/x86/asm-primitives.cpp<br>
--- a/source/common/x86/asm-primitives.cpp Thu May 14 17:12:14 2015 +0530<br>
+++ b/source/common/x86/asm-primitives.cpp Mon May 18 11:54:50 2015 +0530<br>
@@ -804,7 +804,7 @@<br>
p.scanPosLast = x265_scanPosLast_x64;<br>
#endif<br>
<br>
- if (cpuMask & X265_CPU_SSE2)<br>
+ if (cpuMask & X265_CPU_SSE2 & 0)<br>
{<br>
/* We do not differentiate CPUs which support MMX and not SSE2. We only check<br>
* for SSE2 and then use both MMX and SSE2 functions */<br>
@@ -1329,6 +1329,13 @@<br>
p.pu[LUMA_64x48].sad = x265_pixel_sad_64x48_avx2;<br>
p.pu[LUMA_64x64].sad = x265_pixel_sad_64x64_avx2;<br>
<br>
+ p.pu[LUMA_16x4].sad_x3 = x265_pixel_sad_x3_16x4_avx2;<br>
+ p.pu[LUMA_16x8].sad_x3 = x265_pixel_sad_x3_16x8_avx2;<br>
+ p.pu[LUMA_16x12].sad_x3 = x265_pixel_sad_x3_16x12_avx2;<br>
+ p.pu[LUMA_16x16].sad_x3 = x265_pixel_sad_x3_16x16_avx2;<br>
+ p.pu[LUMA_16x32].sad_x3 = x265_pixel_sad_x3_16x32_avx2;<br>
+ p.pu[LUMA_16x64].sad_x3 = x265_pixel_sad_x3_16x64_avx2;<br>
+<br>
p.pu[LUMA_16x4].convert_p2s = x265_filterPixelToShort_16x4_avx2;<br>
p.pu[LUMA_16x8].convert_p2s = x265_filterPixelToShort_16x8_avx2;<br>
p.pu[LUMA_16x12].convert_p2s = x265_filterPixelToShort_16x12_avx2;<br>
diff -r 8592bf81d084 -r d80ab19fd998 source/common/x86/sad16-a.asm<br>
--- a/source/common/x86/sad16-a.asm Thu May 14 17:12:14 2015 +0530<br>
+++ b/source/common/x86/sad16-a.asm Mon May 18 11:54:50 2015 +0530<br>
@@ -1485,8 +1485,12 @@<br>
SAD_X 4, 8, 4<br>
INIT_YMM avx2<br>
%define XMM_REGS 7<br>
-SAD_X 3, 16, 16<br>
+SAD_X 3, 16, 4<br>
SAD_X 3, 16, 8<br>
+SAD_X 3, 16, 12<br>
+SAD_X 3, 16, 16<br>
+SAD_X 3, 16, 32<br>
+SAD_X 3, 16, 64<br>
%define XMM_REGS 9<br>
SAD_X 4, 16, 16<br>
SAD_X 4, 16, 8<br>
</blockquote></div><br></div>