<div dir="ltr"><div>Changes done ! More performance gain moving paddq instructions out of function to final stage, more than using less registers ! </div><div><br></div><div># HG changeset patch</div><div># User Ramya Sriraman <<a href="mailto:ramya@multicorewareinc.com">ramya@multicorewareinc.com</a>></div><div># Date 1443438827 -19800</div><div># Mon Sep 28 16:43:47 2015 +0530</div><div># Node ID 5f1451e5842252b31442e8b6519138d8033bbb2b</div><div># Parent 69440d394ec2682702cb1fe5479fb1ff0babf69d</div><div>asm: fix sse_ss[64x64] sse2 12bit</div><div><br></div><div>diff -r 69440d394ec2 -r 5f1451e58422 source/common/x86/asm-primitives.cpp</div><div>--- a/source/common/x86/asm-primitives.cpp<span class="" style="white-space:pre"> </span>Mon Sep 28 16:13:55 2015 +0530</div><div>+++ b/source/common/x86/asm-primitives.cpp<span class="" style="white-space:pre"> </span>Mon Sep 28 16:43:47 2015 +0530</div><div>@@ -1006,10 +1006,11 @@</div><div> p.chroma[X265_CSP_I422].cu[BLOCK_422_4x8].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_4x8_mmx2);</div><div> p.chroma[X265_CSP_I422].cu[BLOCK_422_8x16].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_8x16_sse2);</div><div> p.chroma[X265_CSP_I422].cu[BLOCK_422_16x32].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_16x32_sse2);</div><div>-#if X265_DEPTH <= 10</div><div>- <a href="http://p.cu">p.cu</a>[BLOCK_4x4].sse_ss = PFX(pixel_ssd_ss_4x4_mmx2);</div><div>- ALL_LUMA_CU(sse_ss, pixel_ssd_ss, sse2);</div><div>-#endif</div><div>+ <a href="http://p.cu">p.cu</a>[BLOCK_4x4].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_4x4_mmx2);</div><div>+ <a href="http://p.cu">p.cu</a>[BLOCK_8x8].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_8x8_sse2);</div><div>+ <a href="http://p.cu">p.cu</a>[BLOCK_16x16].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_16x16_sse2);</div><div>+ <a href="http://p.cu">p.cu</a>[BLOCK_32x32].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_32x32_sse2);</div><div>+ <a href="http://p.cu">p.cu</a>[BLOCK_64x64].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_64x64_sse2);</div><div> <a href="http://p.cu">p.cu</a>[BLOCK_4x4].dct = PFX(dct4_sse2);</div><div> <a href="http://p.cu">p.cu</a>[BLOCK_8x8].dct = PFX(dct8_sse2);</div><div> <a href="http://p.cu">p.cu</a>[BLOCK_4x4].idct = PFX(idct4_sse2);</div><div>diff -r 69440d394ec2 -r 5f1451e58422 source/common/x86/ssd-a.asm</div><div>--- a/source/common/x86/ssd-a.asm<span class="" style="white-space:pre"> </span>Mon Sep 28 16:13:55 2015 +0530</div><div>+++ b/source/common/x86/ssd-a.asm<span class="" style="white-space:pre"> </span>Mon Sep 28 16:43:47 2015 +0530</div><div>@@ -183,6 +183,89 @@</div><div> RET</div><div> %endmacro</div><div> </div><div>+;Function to find ssd for 64x4 block, sse2, 12 bit depth</div><div>+;Defined sepeartely to be called from SSD_ONE_SS_64 macro</div><div>+INIT_XMM sse2</div><div>+cglobal ssd_ss_64x4</div><div>+ pxor m4, m4</div><div>+ mov r4d, 4</div><div>+.loop:</div><div>+ ;----process 1st half a row----</div><div>+ movu m0, [r0]</div><div>+ movu m1, [r0 + mmsize]</div><div>+ movu m2, [r2]</div><div>+ movu m3, [r2 + mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+ movu m0, [r0 + 2 * mmsize]</div><div>+ movu m1, [r0 + 3 * mmsize]</div><div>+ movu m2, [r2 + 2 * mmsize]</div><div>+ movu m3, [r2 + 3 * mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+ ;----process 2nd half a row----</div><div>+ movu m0, [r0 + 4 * mmsize]</div><div>+ movu m1, [r0 + 5 * mmsize]</div><div>+ movu m2, [r2 + 4 * mmsize]</div><div>+ movu m3, [r2 + 5 * mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+ movu m0, [r0 + 6 * mmsize]</div><div>+ movu m1, [r0 + 7 * mmsize]</div><div>+ movu m2, [r2 + 6 * mmsize]</div><div>+ movu m3, [r2 + 7 * mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+</div><div>+ add r0, r1</div><div>+ add r2, r3</div><div>+ dec r4d</div><div>+ jnz .loop</div><div>+</div><div>+ mova m0, m4</div><div>+ pxor m1, m1</div><div>+ punpckldq m0, m1</div><div>+ punpckhdq m4, m1</div><div>+ paddq m5, m0</div><div>+ paddq m6, m4</div><div>+</div><div>+ ret</div><div>+%macro SSD_ONE_SS_64 0</div><div>+cglobal pixel_ssd_ss_64x64, 4,6,7</div><div>+ add r1d, r1d</div><div>+ add r3d, r3d</div><div>+ xor r4, r4</div><div>+ pxor m5, m5</div><div>+ pxor m6, m6</div><div>+ mov r5d, 16</div><div>+.iterate:</div><div>+ call ssd_ss_64x4</div><div>+ dec r5</div><div>+ jne .iterate</div><div>+</div><div>+ paddq m5, m6</div><div>+ movhlps m2, m5</div><div>+ paddq m5, m2</div><div>+ movq rax, m5</div><div>+ RET</div><div>+%endmacro</div><div>+</div><div> %macro SSD_TWO 2</div><div> cglobal pixel_ssd_ss_%1x%2, 4,7,8</div><div> FIX_STRIDES r1, r3</div><div>@@ -529,15 +612,16 @@</div><div> </div><div> %if BIT_DEPTH <= 10</div><div> SSD_ONE 32, 64</div><div>+ SSD_TWO 64, 64</div><div> %else</div><div> SSD_ONE_32</div><div>+ SSD_ONE_SS_64</div><div> %endif</div><div> </div><div> SSD_TWO 48, 64</div><div> SSD_TWO 64, 16</div><div> SSD_TWO 64, 32</div><div> SSD_TWO 64, 48</div><div>-SSD_TWO 64, 64</div><div> INIT_YMM avx2</div><div> SSD_ONE 16, 8</div><div> SSD_ONE 16, 16</div><div><br></div></div><div class="gmail_extra"><br clear="all"><div><div class="gmail_signature"><div dir="ltr"><div><div dir="ltr"><div><div><span style="color:rgb(56,118,29)"><br></span></div><div><span style="color:rgb(56,118,29)">Thank you<br></span></div><span style="color:rgb(56,118,29)">Regards<br></span></div><span style="color:rgb(56,118,29)">Ramya</span><br></div></div></div></div></div>
<br><div class="gmail_quote">On Mon, Sep 28, 2015 at 8:40 PM, chen <span dir="ltr"><<a href="mailto:chenm003@163.com" target="_blank">chenm003@163.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div style="line-height:1.7;color:#000000;font-size:14px;font-family:arial"><div>code is right, just some improve suggest in below<br></div><pre><div><div class="h5"><br>At 2015-09-28 19:14:31,<a href="mailto:ramya@multicorewareinc.com" target="_blank">ramya@multicorewareinc.com</a> wrote:
># HG changeset patch
># User Ramya Sriraman <<a href="mailto:ramya@multicorewareinc.com" target="_blank">ramya@multicorewareinc.com</a>>
># Date 1443438827 -19800
># Mon Sep 28 16:43:47 2015 +0530
># Node ID f8d4155a5a6af75bec1ca487213045442c0a38bc
># Parent 69440d394ec2682702cb1fe5479fb1ff0babf69d
>asm: fix sse_ss[64x64] sse2 12bit
>
>diff -r 69440d394ec2 -r f8d4155a5a6a source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp Mon Sep 28 16:13:55 2015 +0530
>+++ b/source/common/x86/asm-primitives.cpp Mon Sep 28 16:43:47 2015 +0530
>@@ -1006,10 +1006,11 @@
> p.chroma[X265_CSP_I422].cu[BLOCK_422_4x8].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_4x8_mmx2);
> p.chroma[X265_CSP_I422].cu[BLOCK_422_8x16].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_8x16_sse2);
> p.chroma[X265_CSP_I422].cu[BLOCK_422_16x32].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_16x32_sse2);
>-#if X265_DEPTH <= 10
>- <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_4x4].sse_ss = PFX(pixel_ssd_ss_4x4_mmx2);
>- ALL_LUMA_CU(sse_ss, pixel_ssd_ss, sse2);
>-#endif
>+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_4x4].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_4x4_mmx2);
>+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_8x8].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_8x8_sse2);
>+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_16x16].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_16x16_sse2);
>+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_32x32].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_32x32_sse2);
>+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_64x64].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_64x64_sse2);
> <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_4x4].dct = PFX(dct4_sse2);
> <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_8x8].dct = PFX(dct8_sse2);
> <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_4x4].idct = PFX(idct4_sse2);
>diff -r 69440d394ec2 -r f8d4155a5a6a source/common/x86/ssd-a.asm
>--- a/source/common/x86/ssd-a.asm Mon Sep 28 16:13:55 2015 +0530
>+++ b/source/common/x86/ssd-a.asm Mon Sep 28 16:43:47 2015 +0530
>@@ -183,6 +183,84 @@
> RET
> %endmacro
>
>+;Function to find ssd for 4x64 block, sse2, 12 bit depth
>+;Defined sepeartely to be called from SSD_ONE_SS_64 macro
>+INIT_XMM sse2
>+cglobal ssd_ss_4x64<br></div></div>We use function name as Width x Height, it means 4 pixels and 64 rows, it can't match to below code<span class=""><br>
>+ pxor m8, m8
>+ mov r4d, 4
>+.loop:
>+ ;----process 1st half a row----
>+ movu m0, [r0]
>+ movu m1, [r0 + mmsize]
>+ movu m2, [r0 + 2 * mmsize]
>+ movu m3, [r0 + 3 * mmsize]
>+ movu m4, [r2]
>+ movu m5, [r2 + mmsize]
>+ movu m6, [r2 + 2 * mmsize]
>+ movu m7, [r2 + 3 * mmsize]<br></span>split into 2 rows format can reduce half of registers, e.g. (m0,m1) - (m2,m3)<div><div class="h5"><br>
>+ psubw m0, m4
>+ psubw m1, m5
>+ psubw m2, m6
>+ psubw m3, m7
>+ pmaddwd m0, m0
>+ pmaddwd m1, m1
>+ pmaddwd m2, m2
>+ pmaddwd m3, m3
>+ paddd m2, m3
>+ paddd m0, m1
>+ paddd m0, m2
>+ paddd m8, m0
>+ ;----process 2nd half a row----
>+ movu m0, [r0 + 4 * mmsize]
>+ movu m1, [r0 + 5 * mmsize]
>+ movu m2, [r0 + 6 * mmsize]
>+ movu m3, [r0 + 7 * mmsize]
>+ movu m4, [r2 + 4 * mmsize]
>+ movu m5, [r2 + 5 * mmsize]
>+ movu m6, [r2 + 6 * mmsize]
>+ movu m7, [r2 + 7 * mmsize]
>+ psubw m0, m4
>+ psubw m1, m5
>+ psubw m2, m6
>+ psubw m3, m7
>+ pmaddwd m0, m0
>+ pmaddwd m1, m1
>+ pmaddwd m2, m2
>+ pmaddwd m3, m3
>+ paddd m2, m3
>+ paddd m0, m1
>+ paddd m0, m2
>+ paddd m8, m0
>+ add r0, r1
>+ add r2, r3
>+ dec r4d
>+ jnz .loop
>+
>+ mova m4, m8
>+ pxor m5, m5
>+ punpckldq m8, m5
>+ punpckhdq m4, m5
>+ paddq m4, m8
>+ movhlps m5, m4
>+ paddq m4, m5
>+ paddq m9, m4<br></div></div>for single function, above code to sum into m9 is right</pre><pre>but for below loop, it spending lots of time, we can do it in final stage.<span class=""><br>
>+ ret
>+%macro SSD_ONE_SS_64 0
>+cglobal pixel_ssd_ss_64x64, 4,7,10
>+ add r1d, r1d
>+ add r3d, r3d
>+ xor r4, r4
>+ pxor m9, m9
>+ mov r5d, 16
>+.iterate:
>+ call ssd_ss_4x64
>+ dec r5
>+ jne .iterate
>+ movq rax, m9
>+ RET
>+%endmacro
</span></pre></div><br>_______________________________________________<br>
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<br></blockquote></div><br></div>