<div dir="ltr"><div># HG changeset patch</div><div># User Ramya Sriraman <<a href="mailto:ramya@multicorewareinc.com">ramya@multicorewareinc.com</a>></div><div># Date 1444216029 -19800</div><div># Wed Oct 07 16:37:09 2015 +0530</div><div># Node ID 6b2c146d0bcf28a19e7defe977a8f063240a3905</div><div># Parent 0ea631d6f87d4fc056da26ff94c6ffa1120e69bd</div><div>asm:Fix sse_ss [32x32] & [64x64] main12 SSE2</div><div><br></div><div>diff -r 0ea631d6f87d -r 6b2c146d0bcf source/common/x86/asm-primitives.cpp</div><div>--- a/source/common/x86/asm-primitives.cpp<span class="" style="white-space:pre"> </span>Wed Oct 07 13:42:06 2015 +0530</div><div>+++ b/source/common/x86/asm-primitives.cpp<span class="" style="white-space:pre"> </span>Wed Oct 07 16:37:09 2015 +0530</div><div>@@ -1006,10 +1006,12 @@</div><div> p.chroma[X265_CSP_I422].cu[BLOCK_422_4x8].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_4x8_mmx2);</div><div> p.chroma[X265_CSP_I422].cu[BLOCK_422_8x16].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_8x16_sse2);</div><div> p.chroma[X265_CSP_I422].cu[BLOCK_422_16x32].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_16x32_sse2);</div><div>-#if X265_DEPTH <= 10</div><div>- <a href="http://p.cu">p.cu</a>[BLOCK_4x4].sse_ss = PFX(pixel_ssd_ss_4x4_mmx2);</div><div>- ALL_LUMA_CU(sse_ss, pixel_ssd_ss, sse2);</div><div>-#endif</div><div>+ <a href="http://p.cu">p.cu</a>[BLOCK_4x4].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_4x4_mmx2);</div><div>+ <a href="http://p.cu">p.cu</a>[BLOCK_8x8].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_8x8_sse2);</div><div>+ <a href="http://p.cu">p.cu</a>[BLOCK_16x16].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_16x16_sse2);</div><div>+ <a href="http://p.cu">p.cu</a>[BLOCK_32x32].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_32x32_sse2);</div><div>+ <a href="http://p.cu">p.cu</a>[BLOCK_64x64].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_64x64_sse2);</div><div>+</div><div> <a href="http://p.cu">p.cu</a>[BLOCK_4x4].dct = PFX(dct4_sse2);</div><div> <a href="http://p.cu">p.cu</a>[BLOCK_8x8].dct = PFX(dct8_sse2);</div><div> <a href="http://p.cu">p.cu</a>[BLOCK_4x4].idct = PFX(idct4_sse2);</div><div>diff -r 0ea631d6f87d -r 6b2c146d0bcf source/common/x86/ssd-a.asm</div><div>--- a/source/common/x86/ssd-a.asm<span class="" style="white-space:pre"> </span>Wed Oct 07 13:42:06 2015 +0530</div><div>+++ b/source/common/x86/ssd-a.asm<span class="" style="white-space:pre"> </span>Wed Oct 07 16:37:09 2015 +0530</div><div>@@ -183,6 +183,208 @@</div><div> RET</div><div> %endmacro</div><div> </div><div>+%macro SSD_ONE_SS_32 0</div><div>+cglobal pixel_ssd_ss_32x32, 4,5,7</div><div>+ add r1d, r1d</div><div>+ add r3d, r3d</div><div>+ pxor m5, m5</div><div>+ pxor m6, m6</div><div>+ mov r4d, 8</div><div>+.iterate:</div><div>+ pxor m4, m4</div><div>+</div><div>+ movu m0, [r0]</div><div>+ movu m1, [r0 + mmsize]</div><div>+ movu m2, [r2]</div><div>+ movu m3, [r2 + mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+ movu m0, [r0 + 2 * mmsize]</div><div>+ movu m1, [r0 + 3 * mmsize]</div><div>+ movu m2, [r2 + 2 * mmsize]</div><div>+ movu m3, [r2 + 3 * mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+</div><div>+ add r0, r1</div><div>+ add r2, r3</div><div>+</div><div>+ movu m0, [r0]</div><div>+ movu m1, [r0 + mmsize]</div><div>+ movu m2, [r2]</div><div>+ movu m3, [r2 + mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+ movu m0, [r0 + 2 * mmsize]</div><div>+ movu m1, [r0 + 3 * mmsize]</div><div>+ movu m2, [r2 + 2 * mmsize]</div><div>+ movu m3, [r2 + 3 * mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+</div><div>+ add r0, r1</div><div>+ add r2, r3</div><div>+</div><div>+ movu m0, [r0]</div><div>+ movu m1, [r0 + mmsize]</div><div>+ movu m2, [r2]</div><div>+ movu m3, [r2 + mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+ movu m0, [r0 + 2 * mmsize]</div><div>+ movu m1, [r0 + 3 * mmsize]</div><div>+ movu m2, [r2 + 2 * mmsize]</div><div>+ movu m3, [r2 + 3 * mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+</div><div>+ add r0, r1</div><div>+ add r2, r3</div><div>+</div><div>+ movu m0, [r0]</div><div>+ movu m1, [r0 + mmsize]</div><div>+ movu m2, [r2]</div><div>+ movu m3, [r2 + mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+ movu m0, [r0 + 2 * mmsize]</div><div>+ movu m1, [r0 + 3 * mmsize]</div><div>+ movu m2, [r2 + 2 * mmsize]</div><div>+ movu m3, [r2 + 3 * mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+</div><div>+ add r0, r1</div><div>+ add r2, r3</div><div>+</div><div>+ mova m0, m4</div><div>+ pxor m1, m1</div><div>+ punpckldq m0, m1</div><div>+ punpckhdq m4, m1</div><div>+ paddq m5, m0</div><div>+ paddq m6, m4</div><div>+</div><div>+ dec r4d</div><div>+ jnz .iterate</div><div>+</div><div>+ paddq m5, m6</div><div>+ movhlps m2, m5</div><div>+ paddq m5, m2</div><div>+ movq rax, m5</div><div>+ RET</div><div>+%endmacro</div><div>+</div><div>+%macro SSD_ONE_SS_64 0</div><div>+cglobal pixel_ssd_ss_64x64, 4,6,7</div><div>+ add r1d, r1d</div><div>+ add r3d, r3d</div><div>+ pxor m5, m5</div><div>+ pxor m6, m6</div><div>+ mov r5d, 16</div><div>+</div><div>+.iterate:</div><div>+ pxor m4, m4</div><div>+ mov r4d, 4</div><div>+</div><div>+.loop:</div><div>+ ;----process 1st half a row----</div><div>+ movu m0, [r0]</div><div>+ movu m1, [r0 + mmsize]</div><div>+ movu m2, [r2]</div><div>+ movu m3, [r2 + mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+ movu m0, [r0 + 2 * mmsize]</div><div>+ movu m1, [r0 + 3 * mmsize]</div><div>+ movu m2, [r2 + 2 * mmsize]</div><div>+ movu m3, [r2 + 3 * mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+ ;----process 2nd half a row----</div><div>+ movu m0, [r0 + 4 * mmsize]</div><div>+ movu m1, [r0 + 5 * mmsize]</div><div>+ movu m2, [r2 + 4 * mmsize]</div><div>+ movu m3, [r2 + 5 * mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+ movu m0, [r0 + 6 * mmsize]</div><div>+ movu m1, [r0 + 7 * mmsize]</div><div>+ movu m2, [r2 + 6 * mmsize]</div><div>+ movu m3, [r2 + 7 * mmsize]</div><div>+ psubw m0, m2</div><div>+ psubw m1, m3</div><div>+ pmaddwd m0, m0</div><div>+ pmaddwd m1, m1</div><div>+ paddd m4, m0</div><div>+ paddd m4, m1</div><div>+</div><div>+ add r0, r1</div><div>+ add r2, r3</div><div>+</div><div>+ dec r4d</div><div>+ jnz .loop</div><div>+</div><div>+ mova m0, m4</div><div>+ pxor m1, m1</div><div>+ punpckldq m0, m1</div><div>+ punpckhdq m4, m1</div><div>+ paddq m5, m0</div><div>+ paddq m6, m4</div><div>+</div><div>+ dec r5</div><div>+ jne .iterate</div><div>+</div><div>+ paddq m5, m6</div><div>+ movhlps m2, m5</div><div>+ paddq m5, m2</div><div>+ movq rax, m5</div><div>+ RET</div><div>+%endmacro</div><div>+</div><div> %macro SSD_TWO 2</div><div> cglobal pixel_ssd_ss_%1x%2, 4,7,8</div><div> FIX_STRIDES r1, r3</div><div>@@ -525,19 +727,20 @@</div><div> SSD_ONE 32, 8</div><div> SSD_ONE 32, 16</div><div> SSD_ONE 32, 24</div><div>-SSD_ONE 32, 32</div><div> </div><div> %if BIT_DEPTH <= 10</div><div> SSD_ONE 32, 64</div><div>+ SSD_ONE 32, 32</div><div>+ SSD_TWO 64, 64</div><div> %else</div><div> SSD_ONE_32</div><div>+ SSD_ONE_SS_32</div><div>+ SSD_ONE_SS_64</div><div> %endif</div><div>-</div><div> SSD_TWO 48, 64</div><div> SSD_TWO 64, 16</div><div> SSD_TWO 64, 32</div><div> SSD_TWO 64, 48</div><div>-SSD_TWO 64, 64</div><div> INIT_YMM avx2</div><div> SSD_ONE 16, 8</div><div> SSD_ONE 16, 16</div><div><br></div></div><div class="gmail_extra"><br clear="all"><div><div class="gmail_signature"><div dir="ltr"><div><div dir="ltr"><div><div><span style="color:rgb(56,118,29)"><br></span></div><div><span style="color:rgb(56,118,29)">Thank you<br></span></div><span style="color:rgb(56,118,29)">Regards<br></span></div><span style="color:rgb(56,118,29)">Ramya</span><br></div></div></div></div></div>
<br><div class="gmail_quote">On Wed, Oct 14, 2015 at 8:54 PM, chen <span dir="ltr"><<a href="mailto:chenm003@163.com" target="_blank">chenm003@163.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div style="line-height:1.7;color:#000000;font-size:14px;font-family:arial"><div>just said it is right.</div><div>use series CALL may reduce performance, especially CALL in a loop, I suggest copy ssd_ss_32x4 code to there.<br></div><pre><div><div class="h5"><br>At 2015-10-14 17:36:37,<a href="mailto:ramya@multicorewareinc.com" target="_blank">ramya@multicorewareinc.com</a> wrote:
># HG changeset patch
># User Ramya Sriraman <<a href="mailto:ramya@multicorewareinc.com" target="_blank">ramya@multicorewareinc.com</a>>
># Date 1444216029 -19800
># Wed Oct 07 16:37:09 2015 +0530
># Node ID 6597371dcf4ffe45590c915738544e4acd25def6
># Parent 7f984cbb0a15ed6b5ffc7ea843ce6a5380b31179
>asm:Fix sse_ss [32x32] & [64x64] for main12 SSE2
>
>diff -r 7f984cbb0a15 -r 6597371dcf4f source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp Wed Oct 07 13:42:41 2015 +0530
>+++ b/source/common/x86/asm-primitives.cpp Wed Oct 07 16:37:09 2015 +0530
>@@ -1006,10 +1006,12 @@
> p.chroma[X265_CSP_I422].cu[BLOCK_422_4x8].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_4x8_mmx2);
> p.chroma[X265_CSP_I422].cu[BLOCK_422_8x16].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_8x16_sse2);
> p.chroma[X265_CSP_I422].cu[BLOCK_422_16x32].sse_pp = (pixel_sse_t)PFX(pixel_ssd_ss_16x32_sse2);
>-#if X265_DEPTH <= 10
>- <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_4x4].sse_ss = PFX(pixel_ssd_ss_4x4_mmx2);
>- ALL_LUMA_CU(sse_ss, pixel_ssd_ss, sse2);
>-#endif
>+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_4x4].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_4x4_mmx2);
>+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_8x8].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_8x8_sse2);
>+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_16x16].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_16x16_sse2);
>+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_32x32].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_32x32_sse2);
>+ <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_64x64].sse_ss = (pixel_sse_ss_t)PFX(pixel_ssd_ss_64x64_sse2);
>+
> <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_4x4].dct = PFX(dct4_sse2);
> <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_8x8].dct = PFX(dct8_sse2);
> <a href="http://p.cu" target="_blank">p.cu</a>[BLOCK_4x4].idct = PFX(idct4_sse2);
>diff -r 7f984cbb0a15 -r 6597371dcf4f source/common/x86/ssd-a.asm
>--- a/source/common/x86/ssd-a.asm Wed Oct 07 13:42:41 2015 +0530
>+++ b/source/common/x86/ssd-a.asm Wed Oct 07 16:37:09 2015 +0530
>@@ -183,6 +183,153 @@
> RET
> %endmacro
>
>+;Function to find ssd for 32x4 block, sse2, 12 bit depth
>+;Defined sepeartely to be called from SSD_ONE_SS_32 macro
>+INIT_XMM sse2
>+cglobal ssd_ss_32x4
>+ pxor m4, m4
>+ mov r4d, 4
>+.loop:
>+ movu m0, [r0]
>+ movu m1, [r0 + mmsize]
>+ movu m2, [r2]
>+ movu m3, [r2 + mmsize]
>+ psubw m0, m2
>+ psubw m1, m3
>+ pmaddwd m0, m0
>+ pmaddwd m1, m1
>+ paddd m4, m0
>+ paddd m4, m1
>+ movu m0, [r0 + 2 * mmsize]
>+ movu m1, [r0 + 3 * mmsize]
>+ movu m2, [r2 + 2 * mmsize]
>+ movu m3, [r2 + 3 * mmsize]
>+ psubw m0, m2
>+ psubw m1, m3
>+ pmaddwd m0, m0
>+ pmaddwd m1, m1
>+ paddd m4, m0
>+ paddd m4, m1
>+
>+ add r0, r1
>+ add r2, r3
>+
>+ dec r4d
>+ jnz .loop
>+
>+ mova m0, m4
>+ pxor m1, m1
>+ punpckldq m0, m1
>+ punpckhdq m4, m1
>+ paddq m5, m0
>+ paddq m6, m4
>+ ret
>+
>+%macro SSD_ONE_SS_32 0
>+cglobal pixel_ssd_ss_32x32, 4,5,7
>+ add r1d, r1d
>+ add r3d, r3d
>+ pxor m5, m5
>+ pxor m6, m6
>+
>+ call ssd_ss_32x4
>+ call ssd_ss_32x4
>+ call ssd_ss_32x4
>+ call ssd_ss_32x4
>+ call ssd_ss_32x4
>+ call ssd_ss_32x4
>+ call ssd_ss_32x4
>+ call ssd_ss_32x4
>+
>+ paddq m5, m6
>+ movhlps m2, m5
>+ paddq m5, m2
>+ movq rax, m5
>+ RET
>+%endmacro
>+
>+;Function to find ssd for 64x4 block, sse2, 12 bit depth
>+;Defined sepeartely to be called from SSD_ONE_SS_64 macro
>+INIT_XMM sse2
>+cglobal ssd_ss_64x4
>+ pxor m4, m4
>+ mov r4d, 4
>+.loop:
>+ ;----process 1st half a row----
>+ movu m0, [r0]
>+ movu m1, [r0 + mmsize]
>+ movu m2, [r2]
>+ movu m3, [r2 + mmsize]
>+ psubw m0, m2
>+ psubw m1, m3
>+ pmaddwd m0, m0
>+ pmaddwd m1, m1
>+ paddd m4, m0
>+ paddd m4, m1
>+ movu m0, [r0 + 2 * mmsize]
>+ movu m1, [r0 + 3 * mmsize]
>+ movu m2, [r2 + 2 * mmsize]
>+ movu m3, [r2 + 3 * mmsize]
>+ psubw m0, m2
>+ psubw m1, m3
>+ pmaddwd m0, m0
>+ pmaddwd m1, m1
>+ paddd m4, m0
>+ paddd m4, m1
>+ ;----process 2nd half a row----
>+ movu m0, [r0 + 4 * mmsize]
>+ movu m1, [r0 + 5 * mmsize]
>+ movu m2, [r2 + 4 * mmsize]
>+ movu m3, [r2 + 5 * mmsize]
>+ psubw m0, m2
>+ psubw m1, m3
>+ pmaddwd m0, m0
>+ pmaddwd m1, m1
>+ paddd m4, m0
>+ paddd m4, m1
>+ movu m0, [r0 + 6 * mmsize]
>+ movu m1, [r0 + 7 * mmsize]
>+ movu m2, [r2 + 6 * mmsize]
>+ movu m3, [r2 + 7 * mmsize]
>+ psubw m0, m2
>+ psubw m1, m3
>+ pmaddwd m0, m0
>+ pmaddwd m1, m1
>+ paddd m4, m0
>+ paddd m4, m1
>+
>+ add r0, r1
>+ add r2, r3
>+ dec r4d
>+ jnz .loop
>+
>+ mova m0, m4
>+ pxor m1, m1
>+ punpckldq m0, m1
>+ punpckhdq m4, m1
>+ paddq m5, m0
>+ paddq m6, m4
>+ ret
>+
>+%macro SSD_ONE_SS_64 0
>+cglobal pixel_ssd_ss_64x64, 4,6,7
>+ add r1d, r1d
>+ add r3d, r3d
>+ pxor m5, m5
>+ pxor m6, m6
>+ mov r5d, 16
>+.iterate:
>+ call ssd_ss_64x4
>+ dec r5
>+ jne .iterate
>+
>+ paddq m5, m6
>+ movhlps m2, m5
>+ paddq m5, m2
>+ movq rax, m5
>+ RET
>+%endmacro
>+
> %macro SSD_TWO 2
> cglobal pixel_ssd_ss_%1x%2, </div></div>4,7,8
> FIX_STRIDES r1, r3
>@@ -551,19 +698,22 @@
> SSD_ONE 32, 8
> SSD_ONE 32, 16
> SSD_ONE 32, 24
>-SSD_ONE 32, 32
>+
>
> %if BIT_DEPTH <= 10
> SSD_ONE 32, 64
>+ SSD_ONE 32, 32
>+ SSD_TWO 64, 64
> %else
> SSD_ONE_32
>+ SSD_ONE_SS_32
>+ SSD_ONE_SS_64
> %endif
>
> SSD_TWO 48, 64
> SSD_TWO 64, 16
> SSD_TWO 64, 32
> SSD_TWO 64, 48
>-SSD_TWO 64, 64
> INIT_YMM avx2
> SSD_ONE 16, 8
> SSD_ONE 16, 32
>_______________________________________________
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</pre></div><br>_______________________________________________<br>
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<br></blockquote></div><br></div>