<div style="line-height:1.7;color:#000000;font-size:14px;font-family:Arial"><pre>>diff -r a7c2f80c18af -r 973560d58dfb source/common/x86/intrapred8.asm
>--- a/source/common/x86/intrapred8.asm Mon Nov 20 14:31:22 2017 +0530
>+++ b/source/common/x86/intrapred8.asm Tue Nov 21 03:10:14 2017 +0800
>@@ -22313,11 +22313,144 @@
> mov [r1 + 64], r3b ; LeftLast
> RET
>
>-INIT_XMM sse4
>-cglobal intra_filter_32x32, 2,4,6
>- mov r2b, byte [r0 + 64] ; topLast
>- mov r3b, byte [r0 + 128] ; LeftLast
>-
>+; this function add strong intra filter
>+INIT_XMM sse4
>+cglobal intra_filter_32x32, 3,8,7
>+ xor r3d, r3d ; R9
>+ xor r4d, r4d ; R10
>+ mov r3b, byte [r0 + 64] ; topLast
<div>>+ mov r4b, byte [r0 + 128] ; LeftLast</div><div><br></div><div>xor+mov = movzx, the xor (clear to zero) does not spending cycle, but affect instruction decode rate</div><div><br></div>>+
>+ ; strong intra filter is diabled
>+ cmp r2m, byte 0
>+ jz .normal_filter32
>+ ; decide to do strong intra filter
>+ xor r5d, r5d ; R11
>+ xor r6d, r6d ; RAX
>+ xor r7d, r7d ; RDI
>+ mov r5b, byte [r0] ; topLeft
>+ mov r6b, byte [r0 + 96] ; leftMiddle
>+ mov r7b, byte [r0 + 32] ; topMiddle
>+
>+ ; threshold = 8
>+ mov r2d, r3d ; R8
>+ add r2d, r5d ; (topLast + topLeft)
>+ shl r7d, 1 ; 2 * topMiddle
<div>>+ sub r2d, r7d</div><div>(A+B) - 2 * C <==> (A-C) + (B-C)</div><div><br></div>>+ mov r7d, r2d ; backup r2d
>+ sar r7d, 31
>+ xor r2d, r7d
>+ sub r2d, r7d ; abs(r2d)
<div>>+ cmp r2d, 8</div><div>; how about this or instruction cdq?</div><div>; abs(x-y)</div><div>mov eax, X
sub eax, Y
sub Y, X
cmovg eax, Y</div><div><br></div><div><br></div>>+ ; bilinearAbove is false
>+ jns .normal_filter32
>+
>+ mov r2d, r5d
>+ add r2d, r4d
>+ shl r6d, 1
>+ sub r2d, r6d
>+ mov r6d, r2d
>+ sar r6d, 31
>+ xor r2d, r6d
>+ sub r2d, r6d
>+ cmp r2d, 8
>+ ; bilinearLeft is false
>+ jns .normal_filter32
>+
>+ ; do strong intra filter shift = 6
>+ mov r2d, r5d
>+ shl r2d, 6
>+ add r2d, 32 ; init
>+ mov r6d, r4d
<div>>+ sub r6w, r5w ; deltaL size is word</div><div>partial register may stall in here</div><div><br></div>>+ mov r7d, r3d
>+ sub r7w, r5w ; deltaR size is word
>+ movd xmm0, r2d
<div>>+ vpbroadcastw xmm0, xmm0</div><div>SSE4?</div><div><br></div>>+ mova xmm4, xmm0
>+
</pre></div>