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text-align:left;">This is v3 of the AArch64 DCT optimization patch. Changes from v2: <br> - Removed unused stride-aware functions (partialButterfly4_neon_stride, <br> partialButterfly8_neon_stride, fastForwardDst4_neon_stride, <br> pass1Butterfly8_sve) <br> - Restored brace style in memcpy loops to match existing codebase <span data-mce-type="bookmark" id="mce_1_start" data-mce-style="overflow:hidden;line-height:0px" style="overflow: hidden; line-height: 0px;"></span><br></div><div style="font-family:Carlibri;font-size:14px;line-height:1.5;
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text-align:left;"><br></div><div id="isReplyContent" style="margin: 0;"><div style="color: #7d8085">Original:</div><ul style="color: #7d8085; font-size:12px; padding-left: 20px"><li>From：Wiki Deng <<a href="mailto:wiki.deng@hj-micro.com">wiki.deng@hj-micro.com</a>></li><li>Date：2026-04-17 14:03:04(中国 (GMT+08:00))</li><li>To：x265-devel <<a href="mailto:x265-devel@videolan.org">x265-devel@videolan.org</a>></li><li>Cc：x265Contributions <<a href="mailto:x265Contributions@multicorewareinc.com">x265Contributions@multicorewareinc.com</a>></li><li>Subject：[PATCH v2] AArch64: Stride-aware DCT optimization for NEON and SVE</li></ul>
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text-align:left;">Hi <br> <br> This is v2 of the AArch64 DCT optimization patch. Changes from v1: <br> - Dropped all intrapred-prim.cpp changes (memcpy is equivalent <br> to NEON intrinsics for compile-time known widths) <br> - Small DCT forward transforms (4×4, 8×8) retain memcpy path; <br> stride-aware only for 16×16 and 32×32 <br> <br> What it does <br> <br> The DCT forward transforms (4×4, 8×8, 16×16, 32×32) operate in <br> two passes: pass 1 transforms rows into an intermediate flat <br> buffer, and pass 2 transforms columns to produce the final <br> coefficients. The encoder passes residual data in stride layout <br> (CU pitch), requiring a memcpy to flatten it before DCT. <br> <br> This patch eliminates that intermediate copy for large transforms <br> by making pass 1 stride-aware — it loads rows directly from <br> src + row * srcStride. For small transforms (4×4, 8×8), memcpy <br> is retained since contiguous loads are more cache-friendly at <br> those sizes. <br> <br> Changes <br> <br> - source/common/aarch64/dct-prim.cpp (+491, −20): <br> Adds *_neon_stride pass-1 kernels for 16×16 and 32×32 DCT. <br> DCT 4×4 and 8×8 retain memcpy. <br> - source/common/aarch64/dct-prim-sve.cpp (+104, −2): <br> Adds stride-aware SVE pass-1 kernels for dct{16,32}_sve. <br> dct8_sve retains memcpy. <br> <br> Note: IDCT/IDST pass 2 already writes to stride layout natively, <br> so no changes were needed. The NEON 16×16 DCT continues using <br> the existing hand-tuned assembly (PFX(dct16_neon) from dct.S); <br> the SVE 16×16 path uses the stride-aware intrinsic. <br> <br> Testing <br> <br> - TestBench: PASS (NEON + SVE, zero mismatches) <br> - Bit-exact output: identical bitstreams before and after <br> <br> End-to-end encoding performance (3840×2160, 100 frames, CRF 28, <br> 16 cores pinned to NUMA node 0, median of 3 runs): <br> <br> Preset Before After Speedup <br> ultrafast 3.30s 3.25s +1.5% <br> superfast 4.66s 4.54s +2.6% <br> veryfast 7.22s 7.03s +2.6% <br> faster 7.34s 7.26s +1.1% <br> fast 8.57s 8.44s +1.5% <br> medium 11.74s 11.23s +4.3% <br> slow 31.35s 30.26s +3.5% <br> slower 112.98s 110.07s +2.6% <br> veryslow 217.67s 209.37s +3.8% <br> placebo 376.74s 360.95s +4.2% <br> <br> All presets show positive speedup. Slower presets benefit more <br> (+3–4%) as DCT occupies a larger share of encoder cycles when <br> ME/RDO search is more thorough. <br> <br> Environment <br> <br> - AArch64, GCC 13.2.1, <br> - SIMD: NEON, Neon_DotProd, Neon_I8MM, SVE, SVE2, SVE2_BitPerm <br> <br></div><div style="font-family:Carlibri;font-size:14px;line-height:1.5;
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text-align:left;">BR</div></div><div class="mail-signature"> <div class="lingxi-signature-container" style="font-family: PingFang,Source Han Sans,sans-serif;"> <a id="lingxi-signature-block" style="display: block;width: 100%;position: relative;text-decoration: none;text-underline: none;" href="https://lingxi.office.163.com/static_html/signature.html?id=2562016418918405761&show="> <div style="position: absolute;top:16px;left: 0px;border-radius: 50%"> <img src="https://cowork-storage-public-cdn.lx.netease.com/sign/2023/01/30/c68a9dda9f2b43f89e54edd04c68f7e1.png" style="border-radius: 50%;object-fit: cover;width: 40px;height: 40px;" itemid="avatar" width="40px" height="40px"> </div> <div id="lingxi-signature-content" itemid="id" style="border-bottom: 1px solid #E1E6ED;font-size: 14px;line-height: 16px;color: #7A8599;padding: 16px 16px 4px 0px;margin-left: 52px;word-break: break-all; " itemprop="1133238"> <div style="color: #232D47;border: none;margin-bottom:4px;font-size: 16px;line-height: 17px;height:17px;text-underline: none;font-weight: bolder;overflow: hidden;" itemid="name">Wiki Deng</div> <div style="border: none;margin-bottom:8px;text-underline: none;" itemid="email">wiki.deng@hj-micro.com</div> </div> </a> <div style="padding-left:52px;color: #7A8599;font-size: 12px;margin-top: 12px;padding-bottom:14px;"> 签名由 <a href="https://hubble.netease.com/sl/aaagLd" style="color:#4C6AFF;display: inline-block;text-underline: none;text-decoration: none;">网易灵犀办公</a> 定制 </div> </div></div><div></div><div class="pre-mail-content"><div style="font-family:Carlibri;font-size:14px;line-height:1.5;
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text-align:left;"><br></div><div id="isReplyContent" style="margin: 0;"><div style="color: #7d8085">Original:</div><ul style="color: #7d8085; font-size:12px; padding-left: 20px"><li>From：Wiki Deng <<a href="mailto:wiki.deng@hj-micro.com">wiki.deng@hj-micro.com</a>></li><li>Date：2026-04-10 17:18:49(中国 (GMT+08:00))</li><li>To：x265-devel <<a href="mailto:x265-devel@videolan.org">x265-devel@videolan.org</a>></li><li>Cc：x265Contributions <<a href="mailto:x265Contributions@multicorewareinc.com">x265Contributions@multicorewareinc.com</a>></li><li>Subject：[PATCH 0/2] AArch64: DCT optimization and NEON intrapred fix </li></ul>
<div style="text-align: left;" data-mce-style="text-align: left;"><span style="font-size: 18px;" data-mce-style="font-size: 18px;">Hi, </span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> </span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> This patch series contains two AArch64 NEON optimizations for x265:</span></div><div><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> Patch 1: AArch64: Optimize DCT kernels with stride-aware implementations</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> The previous DCT implementation performed an unnecessary memcpy into a</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> contiguous buffer before running transforms. This patch introduces</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> stride-aware versions of all DCT butterfly kernels (4x4, 8x8, 16x16,</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> 32x32) that load directly from stride layout, eliminating the</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> intermediate buffer copy. It also adds HIGH_BIT_DEPTH support and</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> replaces memcpy calls in intrapred with NEON-optimized helpers.</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> Performance: DCT 8x8 memory operations reduced by ~75%.</span></div><div><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> Patch 2: AArch64: Fix 4x4 NEON memory overflow in intrapred helpers</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> The 8-bit width=4 NEON copy helpers used vld1_u8/vst1_u8 which</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> read/write 8 bytes instead of the required 4 bytes. In</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> all_angs_pred_neon<2>(), 4x4 mode outputs are packed contiguously</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> (16 bytes per mode), so writing 8 bytes per row overwrites adjacent</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> mode buffers.</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> Fixed by switching to scalar copy for exact 4-byte access, which also</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> avoids strict aliasing UB from uint32_t* casts and potential alignment</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> issues.</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> Affected files:</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> - source/common/aarch64/dct-prim.cpp</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> - source/common/aarch64/dct-prim-sve.cpp</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> - source/common/aarch64/intrapred-prim.cpp</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;"> Best regards,</span><br><br><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;">Wiki Deng</span><br><span style="font-size: 18px;" data-mce-style="font-size: 18px;">wiki.deng@hj-micro.com</span><br><br></div>
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