[x264-devel] [PATCH] Updated configure to detect MIPS platform and set flags.

[Kaustubh Raste]

The MIPS GCC compiler we are using has been configured with following flags.

Target: mips-mti-linux-gnu
Configured with: /user/mipsswt/git/gcc/configure --prefix=/user/mipsswt/install-mips-mti-linux-gnu --disable-libssp --disable-libgomp --disable-libmudflap --disable-decimal-float --with-mips-plt --target=mips-mti-linux-gnu --enable-languages=c,c++ --enable-__cxa_atexit --with-sysroot=/user/mipsswt/install-mips-mti-linux-gnu/sysroot --with-build-sysroot=/user/mipsswt/install-mips-mti-linux-gnu/sysroot --with-bugurl=mips.support at imgtec.com --with-pkgversion='Codescape GNU Tools 2015.01-5 for MIPS MTI Linux'
Thread model: posix

The target triplet used in this configuration is mips-mti-linux-gnu. The supported architectures by this compiler (-march=XXX) contains mips64r2 mips64r3 mips64r5 mips64r6 etc.
Thus we have used mips32r5 and mips64r6 etc. and not mipsisa*

Signed-off-by: Kaustubh Raste <kaustubh.raste at imgtec.com>
---
 config.sub |  8 ++++++++
 configure  | 35 +++++++++++++++++++++++++++++++++--
 2 files changed, 41 insertions(+), 2 deletions(-)

diff --git a/config.sub b/config.sub
index 8df5511..9b67804 100755
--- a/config.sub
+++ b/config.sub
@@ -294,6 +294,10 @@ case $basic_machine in
 	| mipsisa64sb1 | mipsisa64sb1el \
 	| mipsisa64sr71k | mipsisa64sr71kel \
 	| mipstx39 | mipstx39el \
+	| mips32r5 | mips32r5el \
+	| mips32r6 | mips32r6el \
+	| mips64r5 | mips64r5el \
+	| mips64r6 | mips64r6el \
 	| mn10200 | mn10300 \
 	| moxie \
 	| mt \
@@ -411,6 +415,10 @@ case $basic_machine in
 	| mipsisa64sb1-* | mipsisa64sb1el-* \
 	| mipsisa64sr71k-* | mipsisa64sr71kel-* \
 	| mipstx39-* | mipstx39el-* \
+	| mips32r5-* | mips32r5el-* \
+	| mips32r6-* | mips32r6el-* \
+	| mips64r5-* | mips64r5el-* \
+	| mips64r6-* | mips64r6el-* \
 	| mmix-* \
 	| mt-* \
 	| msp430-* \
diff --git a/configure b/configure
index 15b1c91..56e2a11 100755
--- a/configure
+++ b/configure
@@ -364,7 +364,8 @@ NL="
 
 # list of all preprocessor HAVE values we can define
 CONFIG_HAVE="MALLOC_H ALTIVEC ALTIVEC_H MMX ARMV6 ARMV6T2 NEON BEOSTHREAD POSIXTHREAD WIN32THREAD THREAD LOG2F SWSCALE \
-             LAVF FFMS GPAC AVS GPL VECTOREXT INTERLACED CPU_COUNT OPENCL THP LSMASH X86_INLINE_ASM AS_FUNC INTEL_DISPATCHER"
+             LAVF FFMS GPAC AVS GPL VECTOREXT INTERLACED CPU_COUNT OPENCL THP LSMASH X86_INLINE_ASM AS_FUNC INTEL_DISPATCHER \
+             MSA"
 
 # parse options
 
@@ -733,8 +734,25 @@ case $host_cpu in
     sparc)
         ARCH="SPARC"
         ;;
-    mips|mipsel|mips64|mips64el)
+    mips*)
         ARCH="MIPS"
+        case $host_cpu in
+            mips32r5|mips32r5el)
+                CFLAGS="$CFLAGS -mips32r5 -msched-weight -funroll-loops -mload-store-pairs -mhard-float -mfp64"
+                if [ $host_cpu = mips32r5el ] ; then
+                    CFLAGS="$CFLAGS -EL"
+                    LDFLAGS="$LDFLAGS -EL"
+                fi
+                ;;
+            mips64r6|mips64r6el)
+                CFLAGS="$CFLAGS -mips64r6 -mabi=64 -msched-weight -funroll-loops -mload-store-pairs -mhard-float -mfp64"
+                LDFLAGS="$LDFLAGS -mabi=64"
+                if [ $host_cpu = mips64r6el ] ; then
+                    CFLAGS="$CFLAGS -EL"
+                    LDFLAGS="$LDFLAGS -EL"
+                fi
+                ;;
+        esac
         ;;
     arm*)
         ARCH="ARM"
@@ -860,6 +878,19 @@ if [ $asm = auto -a \( $ARCH = ARM -o $ARCH = AARCH64 \) ] ; then
     as_check ".func test${NL}.endfunc" && define HAVE_AS_FUNC 1
 fi
 
+if [ $asm = auto -a $ARCH = MIPS ] ; then
+    case $host_cpu in
+        mips32r5|mips32r5el|mips64r6|mips64r6el)
+            echo $CFLAGS | grep -Eq '(-mcpu|-march|-mfpu|-arch)' || CFLAGS="$CFLAGS -mmsa"
+
+            if cc_check '' '' '__asm__("move.v $w5, $w11");' ; then
+                define HAVE_MSA
+                LDFLAGS="$LDFLAGS -mmsa"
+            fi
+            ;;
+    esac
+fi
+
 [ $asm = no ] && AS=""
 [ "x$AS" = x ] && asm="no" || asm="yes"
 
-- 
2.3.2