[x264-devel] [PATCH] MIPS MSA checkasm updated

[Rishikesh More]

Yes, mfc0 is a privileged instruction. In user mode, "rdhwr %0, $2" can be used to access counter.
I am resubmitting patch with "rdhwr %0, $2".  The "rdhwr %0, $2" is tested on actual hardware with  './checkasm --bench'.

Regards,
Rishikesh

-----Original Message-----
From: x264-devel [mailto:x264-devel-bounces at videolan.org] On Behalf Of Henrik Gramner
Sent: Tuesday, May 12, 2015 1:03 AM
To: Mailing list for x264 developers
Subject: Re: [x264-devel] [PATCH] MIPS MSA checkasm updated

On Mon, May 11, 2015 at 4:05 PM, Rishikesh More <Rishikesh.More at imgtec.com> wrote:
> Indeed. I am resubmitting patch with proper instruction.
>
> - Rishikesh

Have you tried running ./checkasm --bench with your patch? I was reading some MIPS documentation and it seems that mfc0 is a privileged instruction which would mean that you can't use it from user mode, "rdhwr %0, $2" might be alternative way of accessing the counter register though.
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