[x265-commits] [x265] rc params: complete documentation for rc params in x265.h
Deepthi Nandakumar
deepthi at multicorewareinc.com
Mon Dec 9 18:02:58 CET 2013
details: http://hg.videolan.org/x265/rev/d8d844b36c6c
branches:
changeset: 5569:d8d844b36c6c
user: Deepthi Nandakumar <deepthi at multicorewareinc.com>
date: Sat Dec 07 16:29:24 2013 +0530
description:
rc params: complete documentation for rc params in x265.h
Subject: [x265] cmake: simplify use of ENABLE_ASSEMBLY build define
details: http://hg.videolan.org/x265/rev/e1fbbf947b60
branches:
changeset: 5570:e1fbbf947b60
user: Steve Borho <steve at borho.org>
date: Sat Dec 07 17:28:48 2013 -0600
description:
cmake: simplify use of ENABLE_ASSEMBLY build define
The define is only needed in primitives.cpp. Move all of the CPU detect
fallback code together in primitives.cpp making cpu.cpp more standalone. Make
the testbench only build if the assembly code is enabled.
Subject: [x265] testbench: remove long-since idiotic comment
details: http://hg.videolan.org/x265/rev/b29f2f31ec46
branches:
changeset: 5571:b29f2f31ec46
user: Steve Borho <steve at borho.org>
date: Sat Dec 07 17:31:09 2013 -0600
description:
testbench: remove long-since idiotic comment
Subject: [x265] rename IntraPred.cpp to intrapred.cpp to avoid team's hg merge conflict
details: http://hg.videolan.org/x265/rev/d7bdf9a5b2c6
branches:
changeset: 5572:d7bdf9a5b2c6
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 14:53:12 2013 +0800
description:
rename IntraPred.cpp to intrapred.cpp to avoid team's hg merge conflict
Subject: [x265] asm: simplify code by use intra_pred_ang[][], and avoid build error when disable yasm
details: http://hg.videolan.org/x265/rev/660a23104096
branches:
changeset: 5573:660a23104096
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 13:05:31 2013 +0800
description:
asm: simplify code by use intra_pred_ang[][], and avoid build error when disable yasm
Subject: [x265] asm : Modifications for luma_hps and chroma_hps(extra rows)
details: http://hg.videolan.org/x265/rev/3e8632ea6c95
branches:
changeset: 5574:3e8632ea6c95
user: Nabajit Deka <nabajit at multicorewareinc.com>
date: Wed Dec 04 20:24:14 2013 +0550
description:
asm : Modifications for luma_hps and chroma_hps(extra rows)
Subject: [x265] C primitive changes for luma_hps and chroma_hps.
details: http://hg.videolan.org/x265/rev/d19d6ac4bc4b
branches:
changeset: 5575:d19d6ac4bc4b
user: Nabajit Deka <nabajit at multicorewareinc.com>
date: Wed Dec 04 20:37:55 2013 +0550
description:
C primitive changes for luma_hps and chroma_hps.
Subject: [x265] Test bench code for luma_hps and chroma_hps
details: http://hg.videolan.org/x265/rev/f29d063bf40d
branches:
changeset: 5576:f29d063bf40d
user: Nabajit Deka <nabajit at multicorewareinc.com>
date: Wed Dec 04 20:40:33 2013 +0550
description:
Test bench code for luma_hps and chroma_hps
Subject: [x265] Function declarations for modified luma_hps and chroma_hps functions.
details: http://hg.videolan.org/x265/rev/fc7883c471e4
branches:
changeset: 5577:fc7883c471e4
user: Nabajit Deka <nabajit at multicorewareinc.com>
date: Wed Dec 04 20:43:39 2013 +0550
description:
Function declarations for modified luma_hps and chroma_hps functions.
Subject: [x265] Merge branch 'X'
details: http://hg.videolan.org/x265/rev/d11dbd953d6d
branches:
changeset: 5578:d11dbd953d6d
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 15:42:36 2013 +0800
description:
Merge branch 'X'
Subject: [x265] cleanup unused array intra_ang4[]
details: http://hg.videolan.org/x265/rev/f16f9f0ea93c
branches:
changeset: 5579:f16f9f0ea93c
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 17:02:16 2013 +0800
description:
cleanup unused array intra_ang4[]
Subject: [x265] integrating asm code for sa8d in primitives.cpp
details: http://hg.videolan.org/x265/rev/1f96b2234977
branches:
changeset: 5580:1f96b2234977
user: Yuvaraj Venkatesh <yuvaraj at multicorewareinc.com>
date: Thu Dec 05 14:52:26 2013 +0550
description:
integrating asm code for sa8d in primitives.cpp
there was no separate functions for sa8d in assembly, we are just re-using sa8d_inter functions for sa8d.
Subject: [x265] asm: 10bpp code for scale2D_64to32 routine
details: http://hg.videolan.org/x265/rev/4d6b8c30f15e
branches:
changeset: 5581:4d6b8c30f15e
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Thu Dec 05 15:59:02 2013 +0550
description:
asm: 10bpp code for scale2D_64to32 routine
Subject: [x265] asm: improvement intra_pred_ang by SSE4(pextrd,pextrb)
details: http://hg.videolan.org/x265/rev/ca7d44856001
branches:
changeset: 5582:ca7d44856001
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 18:28:55 2013 +0800
description:
asm: improvement intra_pred_ang by SSE4(pextrd,pextrb)
Subject: [x265] asm: assembly code for IntraPredAng4x4 Mode 11 & 25
details: http://hg.videolan.org/x265/rev/36da30382f5f
branches:
changeset: 5583:36da30382f5f
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 18:34:38 2013 +0800
description:
asm: assembly code for IntraPredAng4x4 Mode 11 & 25
Subject: [x265] asm: assembly code for IntraPredAng4x4 Mode 12 & 24
details: http://hg.videolan.org/x265/rev/666ad0f9f68e
branches:
changeset: 5584:666ad0f9f68e
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 18:39:01 2013 +0800
description:
asm: assembly code for IntraPredAng4x4 Mode 12 & 24
Subject: [x265] testbench: swap order to call asm code
details: http://hg.videolan.org/x265/rev/3aa3d68f1552
branches:
changeset: 5585:3aa3d68f1552
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 18:58:17 2013 +0800
description:
testbench: swap order to call asm code
Our old intra_pred_ang algorithm will fill buffer before input pLeft and pabove,
in this time, the offset [-1] pixel equal to [4], it affect detect asm
code error, so I swap the order
Subject: [x265] asm: assembly code for IntraPredAng4x4 Mode 13 & 23
details: http://hg.videolan.org/x265/rev/d77cf817b11e
branches:
changeset: 5586:d77cf817b11e
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 19:11:53 2013 +0800
description:
asm: assembly code for IntraPredAng4x4 Mode 13 & 23
Subject: [x265] asm: assembly code for IntraPredAng4x4 Mode 14 & 22
details: http://hg.videolan.org/x265/rev/2c2f9294e033
branches:
changeset: 5587:2c2f9294e033
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 19:18:35 2013 +0800
description:
asm: assembly code for IntraPredAng4x4 Mode 14 & 22
Subject: [x265] asm: assembly code for IntraPredAng4x4 Mode 15 & 21
details: http://hg.videolan.org/x265/rev/112dabd56faf
branches:
changeset: 5588:112dabd56faf
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 19:38:28 2013 +0800
description:
asm: assembly code for IntraPredAng4x4 Mode 15 & 21
Subject: [x265] asm: assembly code for IntraPredAng4x4 Mode 16 & 20
details: http://hg.videolan.org/x265/rev/56506c2913d8
branches:
changeset: 5589:56506c2913d8
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 19:44:53 2013 +0800
description:
asm: assembly code for IntraPredAng4x4 Mode 16 & 20
Subject: [x265] asm: assembly code for IntraPredAng4x4 Mode 17 & 19
details: http://hg.videolan.org/x265/rev/06cb5289dfcf
branches:
changeset: 5590:06cb5289dfcf
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 20:43:45 2013 +0800
description:
asm: assembly code for IntraPredAng4x4 Mode 17 & 19
Subject: [x265] asm: assembly code for IntraPredAng4x4 Mode 18
details: http://hg.videolan.org/x265/rev/f4b8486659ad
branches:
changeset: 5591:f4b8486659ad
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 20:59:01 2013 +0800
description:
asm: assembly code for IntraPredAng4x4 Mode 18
Subject: [x265] cleanup:merge Intra Pred DC mode into intra_pred[]
details: http://hg.videolan.org/x265/rev/e1cf58c22166
branches:
changeset: 5592:e1cf58c22166
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 22:09:17 2013 +0800
description:
cleanup:merge Intra Pred DC mode into intra_pred[]
Subject: [x265] improvement by remove reduce ADD instruction in intra_pred_dc16
details: http://hg.videolan.org/x265/rev/229ec0d4164f
branches:
changeset: 5593:229ec0d4164f
user: Min Chen <chenm003 at 163.com>
date: Thu Dec 05 22:13:36 2013 +0800
description:
improvement by remove reduce ADD instruction in intra_pred_dc16
Subject: [x265] asm: primitives of sse_ss for 12x16, 24x32, 48x64 and 64xN blocks
details: http://hg.videolan.org/x265/rev/6570bef3bc2b
branches:
changeset: 5594:6570bef3bc2b
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Thu Dec 05 17:50:30 2013 +0550
description:
asm: primitives of sse_ss for 12x16, 24x32, 48x64 and 64xN blocks
Subject: [x265] asm: 16bpp support for sad_x3 - all block sizes
details: http://hg.videolan.org/x265/rev/057581245e2f
branches:
changeset: 5595:057581245e2f
user: Yuvaraj Venkatesh <yuvaraj at multicorewareinc.com>
date: Thu Dec 05 19:25:35 2013 +0550
description:
asm: 16bpp support for sad_x3 - all block sizes
Subject: [x265] asm: 10bpp code for pixel_sub_2xN
details: http://hg.videolan.org/x265/rev/376c68701fb7
branches:
changeset: 5596:376c68701fb7
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Thu Dec 05 18:28:08 2013 +0550
description:
asm: 10bpp code for pixel_sub_2xN
Subject: [x265] asm: 10bpp code for pixel_sub_4xN
details: http://hg.videolan.org/x265/rev/952d606c08ed
branches:
changeset: 5597:952d606c08ed
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Thu Dec 05 19:21:32 2013 +0550
description:
asm: 10bpp code for pixel_sub_4xN
Subject: [x265] asm: 10bpp code for pixel_sub_6x8
details: http://hg.videolan.org/x265/rev/9e0b2aa531a9
branches:
changeset: 5598:9e0b2aa531a9
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Thu Dec 05 20:32:49 2013 +0550
description:
asm: 10bpp code for pixel_sub_6x8
Subject: [x265] asm: 16bpp support for sad_x4 - all block sizes
details: http://hg.videolan.org/x265/rev/ca7d0e04c324
branches:
changeset: 5599:ca7d0e04c324
user: Yuvaraj Venkatesh <yuvaraj at multicorewareinc.com>
date: Thu Dec 05 21:01:35 2013 +0550
description:
asm: 16bpp support for sad_x4 - all block sizes
Subject: [x265] asm: 10bpp code for pixel_sub_8xN
details: http://hg.videolan.org/x265/rev/a30515de4c2d
branches:
changeset: 5600:a30515de4c2d
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Thu Dec 05 21:38:10 2013 +0550
description:
asm: 10bpp code for pixel_sub_8xN
Subject: [x265] asm: 10bpp code for pixel_sub_12x16
details: http://hg.videolan.org/x265/rev/f2ce16c8d65a
branches:
changeset: 5601:f2ce16c8d65a
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Thu Dec 05 22:42:47 2013 +0550
description:
asm: 10bpp code for pixel_sub_12x16
Subject: [x265] all_angs_pred_4x4, asm code for all modes
details: http://hg.videolan.org/x265/rev/be8b52e8f903
branches:
changeset: 5602:be8b52e8f903
user: Praveen Tiwari <praveen at multicorewareinc.com>
date: Thu Dec 05 14:21:23 2013 +0550
description:
all_angs_pred_4x4, asm code for all modes
Subject: [x265] Merge
details: http://hg.videolan.org/x265/rev/6fd83a8d944c
branches:
changeset: 5603:6fd83a8d944c
user: Steve Borho <steve at borho.org>
date: Thu Dec 05 13:51:59 2013 -0600
description:
Merge
Subject: [x265] cmake: move asm-primitives.cpp and asm headers into VS source group
details: http://hg.videolan.org/x265/rev/89b4d233b57f
branches:
changeset: 5604:89b4d233b57f
user: Steve Borho <steve at borho.org>
date: Thu Dec 05 14:56:24 2013 -0600
description:
cmake: move asm-primitives.cpp and asm headers into VS source group
A cosmetic change only
Subject: [x265] primitives: cleanup intra prediction table dimensions
details: http://hg.videolan.org/x265/rev/435c68acd2a1
branches:
changeset: 5605:435c68acd2a1
user: Steve Borho <steve at borho.org>
date: Thu Dec 05 14:59:22 2013 -0600
description:
primitives: cleanup intra prediction table dimensions
Subject: [x265] cmake: remove ENABLE_PRIMITIVES_VEC build option
details: http://hg.videolan.org/x265/rev/46cbb9f96850
branches:
changeset: 5606:46cbb9f96850
user: Steve Borho <steve at borho.org>
date: Thu Dec 05 15:42:38 2013 -0600
description:
cmake: remove ENABLE_PRIMITIVES_VEC build option
The use of the few remaining compiler intrinsic functions is now unconditional.
Compiler detection will remove them cleanly in case they cannot be compiled, so
there is no reason to make them a top level build option
Subject: [x265] cmake: rename ENABLE_PRIMITIVES_ASM to ENABLE_ASSEMBLY
details: http://hg.videolan.org/x265/rev/a3a4689496e8
branches:
changeset: 5607:a3a4689496e8
user: Steve Borho <steve at borho.org>
date: Thu Dec 05 15:56:50 2013 -0600
description:
cmake: rename ENABLE_PRIMITIVES_ASM to ENABLE_ASSEMBLY
And use the same name for the build define. Also, rename
Setup_Vector_Primitives() to Setup_Instrinsic_Primitives()
Subject: [x265] cmake: bump X265_BUILD post 0.6, since x265_param has changed
details: http://hg.videolan.org/x265/rev/9442edac08b7
branches:
changeset: 5608:9442edac08b7
user: Steve Borho <steve at borho.org>
date: Thu Dec 05 16:05:53 2013 -0600
description:
cmake: bump X265_BUILD post 0.6, since x265_param has changed
Subject: [x265] TEncCu: coding style, lower case initial letter for totalCu
details: http://hg.videolan.org/x265/rev/458173c60685
branches:
changeset: 5609:458173c60685
user: Steve Borho <steve at borho.org>
date: Thu Dec 05 20:13:39 2013 -0600
description:
TEncCu: coding style, lower case initial letter for totalCu
Subject: [x265] cmake: add ENABLE_SHARED cmake option, default to ON
details: http://hg.videolan.org/x265/rev/707901470d11
branches:
changeset: 5610:707901470d11
user: Steve Borho <steve at borho.org>
date: Thu Dec 05 22:37:33 2013 -0600
description:
cmake: add ENABLE_SHARED cmake option, default to ON
Allow MSVC users to opt-out; to roughly halve the compile time. Clean up a few
nits in the process.
Subject: [x265] cmake: drop pool test; not seriously used since May
details: http://hg.videolan.org/x265/rev/ebd32ea1f84e
branches:
changeset: 5611:ebd32ea1f84e
user: Steve Borho <steve at borho.org>
date: Thu Dec 05 22:46:25 2013 -0600
description:
cmake: drop pool test; not seriously used since May
Subject: [x265] ratecontrol parameters: add documentation for qcomp
details: http://hg.videolan.org/x265/rev/c889005baa5f
branches:
changeset: 5612:c889005baa5f
user: Deepthi Nandakumar <deepthi at multicorewareinc.com>
date: Fri Dec 06 15:26:30 2013 +0530
description:
ratecontrol parameters: add documentation for qcomp
Subject: [x265] ratecontrol params: documentation for rateTolerance
details: http://hg.videolan.org/x265/rev/08cf1b4ba081
branches:
changeset: 5613:08cf1b4ba081
user: Deepthi Nandakumar <deepthi at multicorewareinc.com>
date: Fri Dec 06 15:37:06 2013 +0530
description:
ratecontrol params: documentation for rateTolerance
Subject: [x265] rc params: documentation on i/p/bfactor, qpstep, crf
details: http://hg.videolan.org/x265/rev/3c0a1652611e
branches:
changeset: 5614:3c0a1652611e
user: Deepthi Nandakumar <deepthi at multicorewareinc.com>
date: Fri Dec 06 16:39:29 2013 +0530
description:
rc params: documentation on i/p/bfactor, qpstep, crf
Subject: [x265] x265: remove obsolete R-D enums
details: http://hg.videolan.org/x265/rev/dadb3ae865cb
branches:
changeset: 5615:dadb3ae865cb
user: Deepthi Nandakumar <deepthi at multicorewareinc.com>
date: Fri Dec 06 16:41:00 2013 +0530
description:
x265: remove obsolete R-D enums
Subject: [x265] asm: cleanup garbage after fucntion declare
details: http://hg.videolan.org/x265/rev/fef16dcf106f
branches:
changeset: 5616:fef16dcf106f
user: Min Chen <chenm003 at 163.com>
date: Fri Dec 06 13:21:07 2013 +0800
description:
asm: cleanup garbage after fucntion declare
Subject: [x265] 16bpp: assembly code for intra_pred_dc4
details: http://hg.videolan.org/x265/rev/059af4b49f8e
branches:
changeset: 5617:059af4b49f8e
user: Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
date: Fri Dec 06 14:32:54 2013 +0550
description:
16bpp: assembly code for intra_pred_dc4
Subject: [x265] 16bpp: assembly code for intra_pred_dc8
details: http://hg.videolan.org/x265/rev/ef6f2bdbaf7d
branches:
changeset: 5618:ef6f2bdbaf7d
user: Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
date: Fri Dec 06 17:06:06 2013 +0550
description:
16bpp: assembly code for intra_pred_dc8
Subject: [x265] 16bpp: assembly code for intra_pred_dc16
details: http://hg.videolan.org/x265/rev/056a712852c9
branches:
changeset: 5619:056a712852c9
user: Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
date: Fri Dec 06 17:33:57 2013 +0550
description:
16bpp: assembly code for intra_pred_dc16
Subject: [x265] 16bpp: assembly code for intra_pred_dc32
details: http://hg.videolan.org/x265/rev/3933b4a1380d
branches:
changeset: 5620:3933b4a1380d
user: Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
date: Fri Dec 06 17:52:40 2013 +0550
description:
16bpp: assembly code for intra_pred_dc32
Subject: [x265] asm: 10bpp code of pixel_sub for 16xN, 24x32, 32xN,48x64 and 64xN
details: http://hg.videolan.org/x265/rev/4bb40809a372
branches:
changeset: 5621:4bb40809a372
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Fri Dec 06 20:53:12 2013 +0550
description:
asm: 10bpp code of pixel_sub for 16xN, 24x32, 32xN,48x64 and 64xN
Subject: [x265] 10bpp: testbench code for pixel_add_ps
details: http://hg.videolan.org/x265/rev/41bfe2b249f8
branches:
changeset: 5622:41bfe2b249f8
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Fri Dec 06 21:57:37 2013 +0550
description:
10bpp: testbench code for pixel_add_ps
Subject: [x265] asm: 10bpp code for pixel_add_ps_2xN
details: http://hg.videolan.org/x265/rev/8eba4667a5e3
branches:
changeset: 5623:8eba4667a5e3
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Fri Dec 06 22:25:55 2013 +0550
description:
asm: 10bpp code for pixel_add_ps_2xN
Subject: [x265] rename IntraPred.cpp to intrapred.cpp
details: http://hg.videolan.org/x265/rev/a5984c686c55
branches:
changeset: 5624:a5984c686c55
user: Min Chen <chenm003 at 163.com>
date: Fri Dec 06 23:25:32 2013 +0800
description:
rename IntraPred.cpp to intrapred.cpp
Subject: [x265] cleanup: merge Intra Pred PLANAR mode into intra_pred[]
details: http://hg.videolan.org/x265/rev/8773f7f028c2
branches:
changeset: 5625:8773f7f028c2
user: Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
date: Fri Dec 06 22:41:10 2013 +0550
description:
cleanup: merge Intra Pred PLANAR mode into intra_pred[]
Subject: [x265] Merge
details: http://hg.videolan.org/x265/rev/f655add8bcc2
branches:
changeset: 5626:f655add8bcc2
user: Steve Borho <steve at borho.org>
date: Fri Dec 06 12:57:17 2013 -0600
description:
Merge
Subject: [x265] Merge branch 'X'
details: http://hg.videolan.org/x265/rev/2353322df540
branches:
changeset: 5627:2353322df540
user: Min Chen <chenm003 at 163.com>
date: Sat Dec 07 09:11:19 2013 +0800
description:
Merge branch 'X'
Subject: [x265] asm: 10bpp code for pixel_add_ps_4xN
details: http://hg.videolan.org/x265/rev/4f9dc5dc44e0
branches:
changeset: 5628:4f9dc5dc44e0
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Sat Dec 07 02:07:10 2013 +0550
description:
asm: 10bpp code for pixel_add_ps_4xN
Subject: [x265] asm: assembly code for DCT8x8
details: http://hg.videolan.org/x265/rev/8ffd72844276
branches:
changeset: 5629:8ffd72844276
user: Min Chen <chenm003 at 163.com>
date: Mon Dec 09 10:20:03 2013 +0800
description:
asm: assembly code for DCT8x8
Subject: [x265] fix bug: avg_pp use weight 32
details: http://hg.videolan.org/x265/rev/5bb46ef28bc5
branches:
changeset: 5630:5bb46ef28bc5
user: Min Chen <chenm003 at 163.com>
date: Mon Dec 09 10:59:45 2013 +0800
description:
fix bug: avg_pp use weight 32
Subject: [x265] Merge
details: http://hg.videolan.org/x265/rev/c7e7003df711
branches:
changeset: 5631:c7e7003df711
user: Deepthi Nandakumar <deepthi at multicorewareinc.com>
date: Mon Dec 09 13:42:18 2013 +0530
description:
Merge
Subject: [x265] x265: fix bad merge
details: http://hg.videolan.org/x265/rev/55d99b6651f2
branches:
changeset: 5632:55d99b6651f2
user: Deepthi Nandakumar <deepthi at multicorewareinc.com>
date: Mon Dec 09 16:08:24 2013 +0530
description:
x265: fix bad merge
Subject: [x265] asm: 10bpp code for pixel_add_ps_8xN
details: http://hg.videolan.org/x265/rev/1c4d5a2538d5
branches:
changeset: 5633:1c4d5a2538d5
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Mon Dec 09 15:10:27 2013 +0550
description:
asm: 10bpp code for pixel_add_ps_8xN
Subject: [x265] asm: 10bpp code for pixel_add_ps_12x16
details: http://hg.videolan.org/x265/rev/ced72100d067
branches:
changeset: 5634:ced72100d067
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Mon Dec 09 15:31:54 2013 +0550
description:
asm: 10bpp code for pixel_add_ps_12x16
Subject: [x265] asm: 10bpp code for pixel_add_ps_16xN
details: http://hg.videolan.org/x265/rev/fdb1ed6efd5b
branches:
changeset: 5635:fdb1ed6efd5b
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Mon Dec 09 15:41:31 2013 +0550
description:
asm: 10bpp code for pixel_add_ps_16xN
Subject: [x265] asm: 10bpp code for pixel_add_ps_24x32
details: http://hg.videolan.org/x265/rev/46a23a64eb1e
branches:
changeset: 5636:46a23a64eb1e
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Mon Dec 09 15:50:01 2013 +0550
description:
asm: 10bpp code for pixel_add_ps_24x32
Subject: [x265] asm: 10bpp code for pixel_add_ps_32xN
details: http://hg.videolan.org/x265/rev/ef3bfef112c1
branches:
changeset: 5637:ef3bfef112c1
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Mon Dec 09 15:57:46 2013 +0550
description:
asm: 10bpp code for pixel_add_ps_32xN
Subject: [x265] asm: 10bpp code for pixel_add_ps_48x64
details: http://hg.videolan.org/x265/rev/69766745fb6d
branches:
changeset: 5638:69766745fb6d
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Mon Dec 09 16:17:20 2013 +0550
description:
asm: 10bpp code for pixel_add_ps_48x64
Subject: [x265] asm: little improvement(pextrd -> movd, jmp to alignlemt address)
details: http://hg.videolan.org/x265/rev/e16a67613973
branches:
changeset: 5639:e16a67613973
user: Min Chen <chenm003 at 163.com>
date: Mon Dec 09 17:37:51 2013 +0800
description:
asm: little improvement(pextrd -> movd, jmp to alignlemt address)
Subject: [x265] asm: 16bpp asm code for intra_pred_ang4_2
details: http://hg.videolan.org/x265/rev/36ffa3ba6039
branches:
changeset: 5640:36ffa3ba6039
user: Yuvaraj Venkatesh <yuvaraj at multicorewareinc.com>
date: Mon Dec 09 17:40:55 2013 +0550
description:
asm: 16bpp asm code for intra_pred_ang4_2
Subject: [x265] asm: 10bpp code for pixel_add_ps_64xN
details: http://hg.videolan.org/x265/rev/6385549fefa3
branches:
changeset: 5641:6385549fefa3
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Mon Dec 09 17:35:35 2013 +0550
description:
asm: 10bpp code for pixel_add_ps_64xN
Subject: [x265] asm: 10bpp code for pixel_add_ps_6x8
details: http://hg.videolan.org/x265/rev/cbd96bfe5732
branches:
changeset: 5642:cbd96bfe5732
user: Murugan Vairavel <murugan at multicorewareinc.com>
date: Mon Dec 09 18:19:57 2013 +0550
description:
asm: 10bpp code for pixel_add_ps_6x8
Subject: [x265] asm: 16bpp support for intra_pred_ang4_3
details: http://hg.videolan.org/x265/rev/9116410f11b4
branches:
changeset: 5643:9116410f11b4
user: Yuvaraj Venkatesh <yuvaraj at multicorewareinc.com>
date: Mon Dec 09 18:03:39 2013 +0550
description:
asm: 16bpp support for intra_pred_ang4_3
Subject: [x265] asm: 16bpp asm code for intra_pred_ang4_4
details: http://hg.videolan.org/x265/rev/6f2660e5a857
branches:
changeset: 5644:6f2660e5a857
user: Yuvaraj Venkatesh <yuvaraj at multicorewareinc.com>
date: Mon Dec 09 18:28:51 2013 +0550
description:
asm: 16bpp asm code for intra_pred_ang4_4
Subject: [x265] 16bpp: assembly code for intra_planar4
details: http://hg.videolan.org/x265/rev/39b7cf1f3a89
branches:
changeset: 5645:39b7cf1f3a89
user: Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
date: Mon Dec 09 14:01:12 2013 +0550
description:
16bpp: assembly code for intra_planar4
Subject: [x265] 16bpp: assembly code for intra_planar8
details: http://hg.videolan.org/x265/rev/4c5a86ff2c99
branches:
changeset: 5646:4c5a86ff2c99
user: Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
date: Mon Dec 09 17:04:08 2013 +0550
description:
16bpp: assembly code for intra_planar8
Subject: [x265] asm: 16bpp asm code for intra_pred_ang4_5
details: http://hg.videolan.org/x265/rev/0587de3aeb9b
branches:
changeset: 5647:0587de3aeb9b
user: Yuvaraj Venkatesh <yuvaraj at multicorewareinc.com>
date: Mon Dec 09 18:53:09 2013 +0550
description:
asm: 16bpp asm code for intra_pred_ang4_5
Subject: [x265] asm: 16bpp asm code for intra_pred_ang4_6
details: http://hg.videolan.org/x265/rev/40e204fcf5d4
branches:
changeset: 5648:40e204fcf5d4
user: Yuvaraj Venkatesh <yuvaraj at multicorewareinc.com>
date: Mon Dec 09 19:10:23 2013 +0550
description:
asm: 16bpp asm code for intra_pred_ang4_6
Subject: [x265] Use correct width/height for chroma in ssd calculation
details: http://hg.videolan.org/x265/rev/7bd7937e762b
branches:
changeset: 5649:7bd7937e762b
user: Shazeb Nawaz Khan <shazeb at multicorewareinc.com>
date: Mon Dec 09 18:02:09 2013 +0530
description:
Use correct width/height for chroma in ssd calculation
diffstat:
source/CMakeLists.txt | 12 +-
source/common/CMakeLists.txt | 5 +-
source/common/cpu.cpp | 61 --
source/common/primitives.cpp | 60 ++-
source/common/x86/asm-primitives.cpp | 45 +
source/common/x86/const-a.asm | 7 +-
source/common/x86/dct8.asm | 226 ++++++++
source/common/x86/dct8.h | 1 +
source/common/x86/intrapred16.asm | 274 ++++++++++
source/common/x86/intrapred8.asm | 3 +-
source/common/x86/pixeladd8.asm | 929 +++++++++++++++++++++++++++-------
source/encoder/ratecontrol.cpp | 4 +-
source/test/pixelharness.cpp | 2 +-
source/test/testbench.cpp | 6 -
source/x265.h | 31 +-
15 files changed, 1372 insertions(+), 294 deletions(-)
diffs (truncated from 2140 to 300 lines):
diff -r a482cf5de173 -r 7bd7937e762b source/CMakeLists.txt
--- a/source/CMakeLists.txt Fri Dec 06 12:57:17 2013 -0600
+++ b/source/CMakeLists.txt Mon Dec 09 18:02:09 2013 +0530
@@ -263,11 +263,9 @@ if(ENABLE_CLI)
install(TARGETS cli DESTINATION bin)
endif(ENABLE_CLI)
-# Test applications
-option(ENABLE_TESTS "Enable Unit Tests" OFF)
-if(ENABLE_TESTS AND NOT XCODE)
- if(ENABLE_ASSEMBLY)
- add_definitions(-DENABLE_ASSEMBLY=1)
- endif(ENABLE_ASSEMBLY)
- add_subdirectory(test)
+if(ENABLE_ASSEMBLY AND NOT XCODE)
+ option(ENABLE_TESTS "Enable Unit Tests" OFF)
+ if(ENABLE_TESTS)
+ add_subdirectory(test)
+ endif()
endif()
diff -r a482cf5de173 -r 7bd7937e762b source/common/CMakeLists.txt
--- a/source/common/CMakeLists.txt Fri Dec 06 12:57:17 2013 -0600
+++ b/source/common/CMakeLists.txt Mon Dec 09 18:02:09 2013 +0530
@@ -1,8 +1,4 @@
# vim: syntax=cmake
-if(ENABLE_ASSEMBLY)
- add_definitions(-DENABLE_ASSEMBLY=1)
-endif(ENABLE_ASSEMBLY)
-
set(LIBCOMMON_HDR
../Lib/TLibCommon/CommonDef.h
../Lib/TLibCommon/ContextTables.h
@@ -107,6 +103,7 @@ set(VEC_PRIMITIVES vec/vec-primitives.cp
source_group(Intrinsics FILES ${VEC_PRIMITIVES})
if(ENABLE_ASSEMBLY)
+ set_source_files_properties(primitives.cpp PROPERTIES COMPILE_FLAGS -DENABLE_ASSEMBLY=1)
set(C_SRCS asm-primitives.cpp pixel.h mc.h ipfilter8.h blockcopy8.h dct8.h)
set(A_SRCS pixel-a.asm const-a.asm cpu-a.asm ssd-a.asm mc-a.asm
mc-a2.asm ipfilter8.asm pixel-util8.asm blockcopy8.asm
diff -r a482cf5de173 -r 7bd7937e762b source/common/cpu.cpp
--- a/source/common/cpu.cpp Fri Dec 06 12:57:17 2013 -0600
+++ b/source/common/cpu.cpp Mon Dec 09 18:02:09 2013 +0530
@@ -289,64 +289,3 @@ uint32_t cpu_detect(void)
return cpu;
}
}
-
-#if !ENABLE_ASSEMBLY
-
-#if defined(_MSC_VER)
-#include <intrin.h>
-#endif
-
-extern "C" {
-int x265_cpu_cpuid_test(void)
-{
- return 0;
-}
-
-#if defined(_MSC_VER)
-#pragma warning(disable: 4100)
-#elif defined(__GNUC__) || defined(__clang__) // use inline assembly, Gnu/AT&T syntax
-#define __cpuidex(regsArray, level, index) \
- __asm__ __volatile__ ("cpuid" \
- : "=a" ((regsArray)[0]), "=b" ((regsArray)[1]), "=c" ((regsArray)[2]), "=d" ((regsArray)[3]) \
- : "0" (level), "2" (index));
-#else
-#error "compiler not supported"
-#endif
-
-void x265_cpu_cpuid(uint32_t op, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
-{
- int output[4];
-
- __cpuidex(output, op, 0);
- *eax = output[0];
- *ebx = output[1];
- *ecx = output[2];
- *edx = output[3];
-}
-
-void x265_cpu_xgetbv(uint32_t op, uint32_t *eax, uint32_t *edx)
-{
- uint64_t out = 0;
-
-#if (defined(_MSC_FULL_VER) && _MSC_FULL_VER >= 160040000) || (defined(__INTEL_COMPILER) && __INTEL_COMPILER >= 1200)
-
- // MSVC 2010 SP1 or later, or similar Intel release
- out = _xgetbv(op);
-
-#elif defined(__GNUC__) || defined(__clang__) // use inline assembly, Gnu/AT&T syntax
-
- uint32_t a, d;
- __asm("xgetbv" : "=a" (a), "=d" (d) : "c" (op) :);
- *eax = a;
- *edx = d;
- return;
-
-#elif defined(_WIN64) // On x64 with older compilers, this is impossible
-
-#endif // if (defined(_MSC_FULL_VER) && _MSC_FULL_VER >= 160040000) || (defined(__INTEL_COMPILER) && __INTEL_COMPILER >= 1200)
-
- *eax = (uint32_t)out;
- *edx = (uint32_t)(out >> 32);
-}
-}
-#endif // if !ENABLE_ASSEMBLY
diff -r a482cf5de173 -r 7bd7937e762b source/common/primitives.cpp
--- a/source/common/primitives.cpp Fri Dec 06 12:57:17 2013 -0600
+++ b/source/common/primitives.cpp Mon Dec 09 18:02:09 2013 +0530
@@ -149,7 +149,65 @@ void x265_setup_primitives(x265_param *p
}
#if !defined(ENABLE_ASSEMBLY)
+#if defined(_MSC_VER)
+#include <intrin.h>
+#endif
+
+extern "C" {
// the intrinsic primitives will not use MMX instructions, so if assembly
// is disabled there should be no reason to use EMMS.
-extern "C" void x265_cpu_emms(void) {}
+void x265_cpu_emms(void) {}
+
+int x265_cpu_cpuid_test(void)
+{
+ return 0;
+}
+
+#if defined(_MSC_VER)
+#pragma warning(disable: 4100)
+#elif defined(__GNUC__) || defined(__clang__) // use inline assembly, Gnu/AT&T syntax
+#define __cpuidex(regsArray, level, index) \
+ __asm__ __volatile__ ("cpuid" \
+ : "=a" ((regsArray)[0]), "=b" ((regsArray)[1]), "=c" ((regsArray)[2]), "=d" ((regsArray)[3]) \
+ : "0" (level), "2" (index));
+#else
+#error "compiler not supported"
#endif
+
+void x265_cpu_cpuid(uint32_t op, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
+{
+ int output[4];
+
+ __cpuidex(output, op, 0);
+ *eax = output[0];
+ *ebx = output[1];
+ *ecx = output[2];
+ *edx = output[3];
+}
+
+void x265_cpu_xgetbv(uint32_t op, uint32_t *eax, uint32_t *edx)
+{
+ uint64_t out = 0;
+
+#if (defined(_MSC_FULL_VER) && _MSC_FULL_VER >= 160040000) || (defined(__INTEL_COMPILER) && __INTEL_COMPILER >= 1200)
+
+ // MSVC 2010 SP1 or later, or similar Intel release
+ out = _xgetbv(op);
+
+#elif defined(__GNUC__) || defined(__clang__) // use inline assembly, Gnu/AT&T syntax
+
+ uint32_t a, d;
+ __asm("xgetbv" : "=a" (a), "=d" (d) : "c" (op) :);
+ *eax = a;
+ *edx = d;
+ return;
+
+#elif defined(_WIN64) // On x64 with older compilers, this is impossible
+
+#endif // if (defined(_MSC_FULL_VER) && _MSC_FULL_VER >= 160040000) || (defined(__INTEL_COMPILER) && __INTEL_COMPILER >= 1200)
+
+ *eax = (uint32_t)out;
+ *edx = (uint32_t)(out >> 32);
+}
+}
+#endif // if !ENABLE_ASSEMBLY
diff -r a482cf5de173 -r 7bd7937e762b source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Fri Dec 06 12:57:17 2013 -0600
+++ b/source/common/x86/asm-primitives.cpp Mon Dec 09 18:02:09 2013 +0530
@@ -666,18 +666,61 @@ void Setup_Assembly_Primitives(EncoderPr
p.chroma[X265_CSP_I420].add_ps[CHROMA_2x4] = x265_pixel_add_ps_2x4_sse2;
p.chroma[X265_CSP_I420].add_ps[CHROMA_2x8] = x265_pixel_add_ps_2x8_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_4x2] = x265_pixel_add_ps_4x2_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_4x4] = x265_pixel_add_ps_4x4_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_4x8] = x265_pixel_add_ps_4x8_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_4x16] = x265_pixel_add_ps_4x16_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_8x2] = x265_pixel_add_ps_8x2_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_8x4] = x265_pixel_add_ps_8x4_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_8x6] = x265_pixel_add_ps_8x6_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_8x8] = x265_pixel_add_ps_8x8_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_8x16] = x265_pixel_add_ps_8x16_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_8x32] = x265_pixel_add_ps_8x32_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_12x16] = x265_pixel_add_ps_12x16_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_16x4] = x265_pixel_add_ps_16x4_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_16x8] = x265_pixel_add_ps_16x8_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_16x12] = x265_pixel_add_ps_16x12_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_16x16] = x265_pixel_add_ps_16x16_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_16x32] = x265_pixel_add_ps_16x32_sse2;
+ p.luma_add_ps[LUMA_16x64] = x265_pixel_add_ps_16x64_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_24x32] = x265_pixel_add_ps_24x32_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_32x8] = x265_pixel_add_ps_32x8_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_32x16] = x265_pixel_add_ps_32x16_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_32x24] = x265_pixel_add_ps_32x24_sse2;
+ p.chroma[X265_CSP_I420].add_ps[CHROMA_32x32] = x265_pixel_add_ps_32x32_sse2;
+ p.luma_add_ps[LUMA_32x64] = x265_pixel_add_ps_32x64_sse2;
+ p.luma_add_ps[LUMA_48x64] = x265_pixel_add_ps_48x64_sse2;
+ p.luma_add_ps[LUMA_64x16] = x265_pixel_add_ps_64x16_sse2;
+ p.luma_add_ps[LUMA_64x32] = x265_pixel_add_ps_64x32_sse2;
+ p.luma_add_ps[LUMA_64x48] = x265_pixel_add_ps_64x48_sse2;
+ p.luma_add_ps[LUMA_64x64] = x265_pixel_add_ps_64x64_sse2;
}
if (cpuMask & X265_CPU_SSSE3)
{
p.scale1D_128to64 = x265_scale1D_128to64_ssse3;
p.scale2D_64to32 = x265_scale2D_64to32_ssse3;
+
+ SETUP_INTRA_ANG4(2, 2, ssse3);
+ SETUP_INTRA_ANG4(34, 2, ssse3);
}
if (cpuMask & X265_CPU_SSE4)
{
+ p.intra_pred[BLOCK_4x4][0] = x265_intra_pred_planar4_sse4;
+ p.intra_pred[BLOCK_8x8][0] = x265_intra_pred_planar8_sse4;
+
p.intra_pred[BLOCK_4x4][1] = x265_intra_pred_dc4_sse4;
p.intra_pred[BLOCK_8x8][1] = x265_intra_pred_dc8_sse4;
p.intra_pred[BLOCK_16x16][1] = x265_intra_pred_dc16_sse4;
p.intra_pred[BLOCK_32x32][1] = x265_intra_pred_dc32_sse4;
+
+ SETUP_INTRA_ANG4(3, 3, sse4);
+ SETUP_INTRA_ANG4(4, 4, sse4);
+ SETUP_INTRA_ANG4(5, 5, sse4);
+ SETUP_INTRA_ANG4(6, 6, sse4);
+ SETUP_INTRA_ANG4(30, 6, sse4);
+ SETUP_INTRA_ANG4(31, 5, sse4);
+ SETUP_INTRA_ANG4(32, 4, sse4);
+ SETUP_INTRA_ANG4(33, 3, sse4);
}
if (cpuMask & X265_CPU_XOP)
{
@@ -931,6 +974,8 @@ void Setup_Assembly_Primitives(EncoderPr
SETUP_INTRA_ANG4(31, 5, sse4);
SETUP_INTRA_ANG4(32, 4, sse4);
SETUP_INTRA_ANG4(33, 3, sse4);
+
+ p.dct[DCT_8x8] = x265_dct8_sse4;
}
if (cpuMask & X265_CPU_AVX)
{
diff -r a482cf5de173 -r 7bd7937e762b source/common/x86/const-a.asm
--- a/source/common/x86/const-a.asm Fri Dec 06 12:57:17 2013 -0600
+++ b/source/common/x86/const-a.asm Mon Dec 09 18:02:09 2013 +0530
@@ -29,7 +29,6 @@
SECTION_RODATA 32
-const pb_1, times 32 db 1
const hsub_mul, times 16 db 1, -1
const pw_1, times 16 dw 1
const pw_16, times 16 dw 16
@@ -39,13 +38,13 @@ const pw_1024, times 16 dw 1024
const pw_4096, times 16 dw 4096
const pw_00ff, times 16 dw 0x00ff
const pw_pixel_max,times 16 dw ((1 << BIT_DEPTH)-1)
-const pd_1, times 8 dd 1
const deinterleave_shufd, dd 0,4,1,5,2,6,3,7
const pb_unpackbd1, times 2 db 0,0,0,0,1,1,1,1,2,2,2,2,3,3,3,3
const pb_unpackbd2, times 2 db 4,4,4,4,5,5,5,5,6,6,6,6,7,7,7,7
const pb_01, times 8 db 0,1
const pb_0, times 16 db 0
+const pb_1, times 32 db 1
const pb_a1, times 16 db 0xa1
const pb_3, times 16 db 3
const pb_shuf8x8c, db 0,0,0,0,2,2,2,2,4,4,4,4,6,6,6,6
@@ -66,9 +65,13 @@ const pw_ppmmppmm, dw 1,1,-1,-1,1,1,-1,-
const pw_pmpmpmpm, dw 1,-1,1,-1,1,-1,1,-1
const pw_pmmpzzzz, dw 1,-1,-1,1,0,0,0,0
+const pd_1, times 4 dd 1
+const pd_2, times 4 dd 2
+const pd_16, times 4 dd 16
const pd_32, times 4 dd 32
const pd_64, times 4 dd 64
const pd_128, times 4 dd 128
+const pd_256, times 4 dd 256
const pd_512, times 4 dd 512
const pd_1024, times 4 dd 1024
const pd_2048, times 4 dd 2048
diff -r a482cf5de173 -r 7bd7937e762b source/common/x86/dct8.asm
--- a/source/common/x86/dct8.asm Fri Dec 06 12:57:17 2013 -0600
+++ b/source/common/x86/dct8.asm Mon Dec 09 18:02:09 2013 +0530
@@ -49,13 +49,30 @@ tab_idst4: times 4 dw 29, +84
times 4 dw 84, +55
times 4 dw -74, -29
+tab_dct8_1: times 2 dw 89, 50, 75, 18
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