[x265-commits] [x265] rc: explicit type conversion to avoid compiler warning

Steve Borho steve at borho.org
Wed Jan 21 15:21:06 CET 2015


details:   http://hg.videolan.org/x265/rev/50a8fa8545cd
branches:  
changeset: 9195:50a8fa8545cd
user:      Steve Borho <steve at borho.org>
date:      Wed Jan 21 08:05:56 2015 -0600
description:
rc: explicit type conversion to avoid compiler warning
Subject: [x265] asm: split setupAssemblyPrimitives() between 8bpp and 16bpp versions

details:   http://hg.videolan.org/x265/rev/7693fdabc11b
branches:  
changeset: 9196:7693fdabc11b
user:      Steve Borho <steve at borho.org>
date:      Tue Jan 20 17:31:25 2015 -0600
description:
asm: split setupAssemblyPrimitives() between 8bpp and 16bpp versions

This is easier to navigate in most editors and IDEs
Subject: [x265] asm: remove LUMA_SP_FILTERS, it was redundant with LUMA_FILTERS

details:   http://hg.videolan.org/x265/rev/643010258427
branches:  
changeset: 9197:643010258427
user:      Steve Borho <steve at borho.org>
date:      Tue Jan 20 17:33:15 2015 -0600
description:
asm: remove LUMA_SP_FILTERS, it was redundant with LUMA_FILTERS
Subject: [x265] asm: slight improvements to macro names

details:   http://hg.videolan.org/x265/rev/a0c084eff60f
branches:  
changeset: 9198:a0c084eff60f
user:      Steve Borho <steve at borho.org>
date:      Tue Jan 20 17:41:35 2015 -0600
description:
asm: slight improvements to macro names

diffstat:

 source/common/x86/asm-primitives.cpp |  316 +++++++++++++++++-----------------
 source/encoder/ratecontrol.cpp       |    2 +-
 2 files changed, 160 insertions(+), 158 deletions(-)

diffs (truncated from 417 to 300 lines):

diff -r 154445474462 -r a0c084eff60f source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Tue Jan 20 16:36:58 2015 -0600
+++ b/source/common/x86/asm-primitives.cpp	Tue Jan 20 17:41:35 2015 -0600
@@ -370,163 +370,163 @@ extern "C" {
     ALL_CHROMA_444_PU(filter_vpp, interp_4tap_vert_pp, cpu); \
     ALL_CHROMA_444_PU(filter_vps, interp_4tap_vert_ps, cpu);
 
-#define SETUP_CHROMA_420_SP_FUNC_DEF(W, H, cpu) \
+#define SETUP_CHROMA_420_VSP_FUNC_DEF(W, H, cpu) \
     p.chroma[X265_CSP_I420].pu[CHROMA_420_ ## W ## x ## H].filter_vsp = x265_interp_4tap_vert_sp_ ## W ## x ## H ## cpu;
 
-#define CHROMA_420_SP_FILTERS_SSE4(cpu) \
-    SETUP_CHROMA_420_SP_FUNC_DEF(4, 4, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(4, 2, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(2, 4, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(4, 8, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(6, 8, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(2, 8, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(16, 16, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(16, 8, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(16, 12, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(12, 16, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(16, 4, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(4, 16, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(32, 32, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(32, 16, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(16, 32, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(32, 24, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(24, 32, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(32, 8, cpu);
+#define CHROMA_420_VSP_FILTERS_SSE4(cpu) \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(4, 4, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(4, 2, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(2, 4, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(4, 8, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(6, 8, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(2, 8, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(16, 16, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(16, 8, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(16, 12, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(12, 16, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(16, 4, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(4, 16, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(32, 32, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(32, 16, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(16, 32, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(32, 24, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(24, 32, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(32, 8, cpu);
 
-#define CHROMA_420_SP_FILTERS(cpu) \
-    SETUP_CHROMA_420_SP_FUNC_DEF(8, 2, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(8, 4, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(8, 6, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(8, 8, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(8, 16, cpu); \
-    SETUP_CHROMA_420_SP_FUNC_DEF(8, 32, cpu);
+#define CHROMA_420_VSP_FILTERS(cpu) \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(8, 2, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(8, 4, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(8, 6, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(8, 8, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(8, 16, cpu); \
+    SETUP_CHROMA_420_VSP_FUNC_DEF(8, 32, cpu);
 
-#define SETUP_CHROMA_422_SP_FUNC_DEF(W, H, cpu) \
+#define SETUP_CHROMA_422_VSP_FUNC_DEF(W, H, cpu) \
     p.chroma[X265_CSP_I422].pu[CHROMA_422_ ## W ## x ## H].filter_vsp = x265_interp_4tap_vert_sp_ ## W ## x ## H ## cpu;
 
-#define CHROMA_422_SP_FILTERS_SSE4(cpu) \
-    SETUP_CHROMA_422_SP_FUNC_DEF(4, 8, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(4, 4, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(2, 8, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(4, 16, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(6, 16, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(2, 16, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(16, 32, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(16, 16, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(16, 24, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(12, 32, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(16, 8, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(4, 32, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(32, 64, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(32, 32, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(16, 64, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(32, 48, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(24, 64, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(32, 16, cpu);
+#define CHROMA_422_VSP_FILTERS_SSE4(cpu) \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(4, 8, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(4, 4, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(2, 8, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(4, 16, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(6, 16, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(2, 16, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(16, 32, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(16, 16, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(16, 24, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(12, 32, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(16, 8, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(4, 32, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(32, 64, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(32, 32, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(16, 64, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(32, 48, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(24, 64, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(32, 16, cpu);
 
-#define CHROMA_422_SP_FILTERS(cpu) \
-    SETUP_CHROMA_422_SP_FUNC_DEF(8, 4, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(8, 8, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(8, 12, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(8, 16, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(8, 32, cpu); \
-    SETUP_CHROMA_422_SP_FUNC_DEF(8, 64, cpu);
+#define CHROMA_422_VSP_FILTERS(cpu) \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(8, 4, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(8, 8, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(8, 12, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(8, 16, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(8, 32, cpu); \
+    SETUP_CHROMA_422_VSP_FUNC_DEF(8, 64, cpu);
 
-#define SETUP_CHROMA_444_SP_FUNC_DEF(W, H, cpu) \
+#define SETUP_CHROMA_444_VSP_FUNC_DEF(W, H, cpu) \
     p.chroma[X265_CSP_I444].pu[LUMA_ ## W ## x ## H].filter_vsp = x265_interp_4tap_vert_sp_ ## W ## x ## H ## cpu;
 
-#define CHROMA_444_SP_FILTERS_SSE4(cpu) \
-    SETUP_CHROMA_444_SP_FUNC_DEF(4, 4, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(4, 8, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(16, 16, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(16, 8, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(16, 12, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(12, 16, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(16, 4, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(4, 16, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(32, 32, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(32, 16, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(16, 32, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(32, 24, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(24, 32, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(32, 8, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(64, 64, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(64, 32, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(32, 64, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(64, 48, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(48, 64, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(64, 16, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(16, 64, cpu);
+#define CHROMA_444_VSP_FILTERS_SSE4(cpu) \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(4, 4, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(4, 8, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(16, 16, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(16, 8, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(16, 12, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(12, 16, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(16, 4, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(4, 16, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(32, 32, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(32, 16, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(16, 32, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(32, 24, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(24, 32, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(32, 8, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(64, 64, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(64, 32, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(32, 64, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(64, 48, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(48, 64, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(64, 16, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(16, 64, cpu);
 
-#define CHROMA_444_SP_FILTERS(cpu) \
-    SETUP_CHROMA_444_SP_FUNC_DEF(8, 8, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(8, 4, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(8, 16, cpu); \
-    SETUP_CHROMA_444_SP_FUNC_DEF(8, 32, cpu);
+#define CHROMA_444_VSP_FILTERS(cpu) \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(8, 8, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(8, 4, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(8, 16, cpu); \
+    SETUP_CHROMA_444_VSP_FUNC_DEF(8, 32, cpu);
 
-#define SETUP_CHROMA_420_SS_FUNC_DEF(W, H, cpu) \
+#define SETUP_CHROMA_420_VSS_FUNC_DEF(W, H, cpu) \
     p.chroma[X265_CSP_I420].pu[CHROMA_420_ ## W ## x ## H].filter_vss = x265_interp_4tap_vert_ss_ ## W ## x ## H ## cpu;
 
-#define CHROMA_420_SS_FILTERS(cpu) \
-    SETUP_CHROMA_420_SS_FUNC_DEF(4, 4, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(4, 2, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(8, 8, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(8, 4, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(4, 8, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(8, 6, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(8, 2, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(16, 16, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(16, 8, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(8, 16, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(16, 12, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(12, 16, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(16, 4, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(4, 16, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(32, 32, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(32, 16, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(16, 32, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(32, 24, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(24, 32, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(32, 8, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(8, 32, cpu);
+#define CHROMA_420_VSS_FILTERS(cpu) \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(4, 4, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(4, 2, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(8, 8, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(8, 4, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(4, 8, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(8, 6, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(8, 2, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(16, 16, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(16, 8, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(8, 16, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(16, 12, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(12, 16, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(16, 4, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(4, 16, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(32, 32, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(32, 16, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(16, 32, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(32, 24, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(24, 32, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(32, 8, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(8, 32, cpu);
 
-#define CHROMA_420_SS_FILTERS_SSE4(cpu) \
-    SETUP_CHROMA_420_SS_FUNC_DEF(2, 4, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(2, 8, cpu); \
-    SETUP_CHROMA_420_SS_FUNC_DEF(6, 8, cpu);
+#define CHROMA_420_VSS_FILTERS_SSE4(cpu) \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(2, 4, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(2, 8, cpu); \
+    SETUP_CHROMA_420_VSS_FUNC_DEF(6, 8, cpu);
 
-#define SETUP_CHROMA_422_SS_FUNC_DEF(W, H, cpu) \
+#define SETUP_CHROMA_422_VSS_FUNC_DEF(W, H, cpu) \
     p.chroma[X265_CSP_I422].pu[CHROMA_422_ ## W ## x ## H].filter_vss = x265_interp_4tap_vert_ss_ ## W ## x ## H ## cpu;
 
-#define CHROMA_422_SS_FILTERS(cpu) \
-    SETUP_CHROMA_422_SS_FUNC_DEF(4, 8, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(4, 4, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(8, 16, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(8, 8, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(4, 16, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(8, 12, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(8, 4, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(16, 32, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(16, 16, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(8, 32, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(16, 24, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(12, 32, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(16, 8, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(4, 32, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(32, 64, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(32, 32, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(16, 64, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(32, 48, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(24, 64, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(32, 16, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(8, 64, cpu);
+#define CHROMA_422_VSS_FILTERS(cpu) \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(4, 8, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(4, 4, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(8, 16, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(8, 8, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(4, 16, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(8, 12, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(8, 4, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(16, 32, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(16, 16, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(8, 32, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(16, 24, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(12, 32, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(16, 8, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(4, 32, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(32, 64, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(32, 32, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(16, 64, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(32, 48, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(24, 64, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(32, 16, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(8, 64, cpu);
 
-#define CHROMA_422_SS_FILTERS_SSE4(cpu) \
-    SETUP_CHROMA_422_SS_FUNC_DEF(2, 8, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(2, 16, cpu); \
-    SETUP_CHROMA_422_SS_FUNC_DEF(6, 16, cpu);
+#define CHROMA_422_VSS_FILTERS_SSE4(cpu) \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(2, 8, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(2, 16, cpu); \
+    SETUP_CHROMA_422_VSS_FUNC_DEF(6, 16, cpu);
 
-#define CHROMA_444_SS_FILTERS(cpu) ALL_CHROMA_444_PU(filter_vss, interp_4tap_vert_ss, cpu)


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