[x265] [PATCH] xIDST4 intrinsic code cleanup

praveen at multicorewareinc.com praveen at multicorewareinc.com
Wed Jul 3 10:21:25 CEST 2013


# HG changeset patch
# User praveentiwari
# Date 1372839671 -19800
# Node ID 0cb92ad723cedcd10fc2f7b4399a1db459585d72
# Parent  d1af3c96400fd609f3ecae87e3d2640a73831d45
xIDST4 intrinsic code cleanup

diff -r d1af3c96400f -r 0cb92ad723ce source/common/vec/dct.inc
--- a/source/common/vec/dct.inc	Wed Jul 03 12:19:18 2013 +0530
+++ b/source/common/vec/dct.inc	Wed Jul 03 13:51:11 2013 +0530
@@ -2232,18 +2232,18 @@
     {  -74, -29, -74, -29, -74, -29, -74, -29 }
 };
 
-void xIDST4(int *pSrc, short *pDst, intptr_t stride)
+void xIDST4(int *src, short *dst, intptr_t stride)
 {
     __m128i m128iAdd, S0, S8, m128iTmp1, m128iTmp2, m128iAC, m128iBD, m128iA, m128iD;
 
     m128iAdd  = _mm_set1_epi32(64);
 
-    m128iTmp1 = _mm_load_si128((__m128i*)&pSrc[0]);
-    m128iTmp2 = _mm_load_si128((__m128i*)&pSrc[4]);
+    m128iTmp1 = _mm_load_si128((__m128i*)&src[0]);
+    m128iTmp2 = _mm_load_si128((__m128i*)&src[4]);
     S0 = _mm_packs_epi32(m128iTmp1, m128iTmp2);
 
-    m128iTmp1 = _mm_load_si128((__m128i*)&pSrc[8]);
-    m128iTmp2 = _mm_load_si128((__m128i*)&pSrc[12]);
+    m128iTmp1 = _mm_load_si128((__m128i*)&src[8]);
+    m128iTmp2 = _mm_load_si128((__m128i*)&src[12]);
     S8 = _mm_packs_epi32(m128iTmp1, m128iTmp2);
 
     m128iAC  = _mm_unpacklo_epi16(S0, S8);
@@ -2322,10 +2322,10 @@
     m128iAC   = _mm_unpacklo_epi16(m128iTmp1, m128iTmp2);
     m128iBD   = _mm_unpackhi_epi16(m128iTmp1, m128iTmp2);
 
-    _mm_storel_epi64((__m128i*)&pDst[0 * stride], m128iAC);
-    _mm_storeh_pi((__m64*)&pDst[1 * stride], _mm_castsi128_ps(m128iAC));
-    _mm_storel_epi64((__m128i*)&pDst[2 * stride], m128iBD);
-    _mm_storeh_pi((__m64*)&pDst[3 * stride], _mm_castsi128_ps(m128iBD));
+    _mm_storel_epi64((__m128i*)&dst[0 * stride], m128iAC);
+    _mm_storeh_pi((__m64*)&dst[1 * stride], _mm_castsi128_ps(m128iAC));
+    _mm_storel_epi64((__m128i*)&dst[2 * stride], m128iBD);
+    _mm_storeh_pi((__m64*)&dst[3 * stride], _mm_castsi128_ps(m128iBD));
 }
 
 #endif // INSTRSET >= 5


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