[x265] [PATCH 7 of 8] asm: interp_4tap_horiz_pp_4x16_sse3

dtyx265 at gmail.com dtyx265 at gmail.com
Fri Apr 17 18:48:03 CEST 2015


# HG changeset patch
# User David T Yuen <dtyx265 at gmail.com>
# Date 1429288614 25200
# Node ID ca6ecc17db77dd60043de682345687f09aed16f3
# Parent  30ecb4d9ee23cd17a0c315c0854a80ed62f59d68
asm: interp_4tap_horiz_pp_4x16_sse3

This replaces c code.

64-bit

./test/TestBench --testbench interp | grep "chroma_hpp\[ 4x16\]"
chroma_hpp[ 4x16]	2.84x 	 3302.49  	 9392.47
chroma_hpp[ 4x16]	2.84x 	 3302.50  	 9392.49

32-bit

./test/TestBench --testbench interp | grep "chroma_hpp\[ 4x16\]"
chroma_hpp[ 4x16]	2.81x 	 3380.07  	 9499.97
chroma_hpp[ 4x16]	2.81x 	 3382.50  	 9499.97

diff -r 30ecb4d9ee23 -r ca6ecc17db77 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Fri Apr 17 09:33:03 2015 -0700
+++ b/source/common/x86/asm-primitives.cpp	Fri Apr 17 09:36:54 2015 -0700
@@ -1361,10 +1361,12 @@
         p.chroma[X265_CSP_I420].pu[CHROMA_420_4x2].filter_hpp = x265_interp_4tap_horiz_pp_4x2_sse3;
         p.chroma[X265_CSP_I420].pu[CHROMA_420_4x4].filter_hpp = x265_interp_4tap_horiz_pp_4x4_sse3;
         p.chroma[X265_CSP_I420].pu[CHROMA_420_4x8].filter_hpp = x265_interp_4tap_horiz_pp_4x8_sse3;
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_4x16].filter_hpp = x265_interp_4tap_horiz_pp_4x16_sse3;
         p.chroma[X265_CSP_I422].pu[CHROMA_422_2x8].filter_hpp = x265_interp_4tap_horiz_pp_2x8_sse3;
         p.chroma[X265_CSP_I422].pu[CHROMA_422_2x16].filter_hpp = x265_interp_4tap_horiz_pp_2x16_sse3;
         p.chroma[X265_CSP_I422].pu[CHROMA_422_4x4].filter_hpp = x265_interp_4tap_horiz_pp_4x4_sse3;
         p.chroma[X265_CSP_I422].pu[CHROMA_422_4x8].filter_hpp = x265_interp_4tap_horiz_pp_4x8_sse3;
+        p.chroma[X265_CSP_I422].pu[CHROMA_422_4x16].filter_hpp = x265_interp_4tap_horiz_pp_4x16_sse3;
     }
     if (cpuMask & X265_CPU_SSSE3)
     {
diff -r 30ecb4d9ee23 -r ca6ecc17db77 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm	Fri Apr 17 09:33:03 2015 -0700
+++ b/source/common/x86/ipfilter8.asm	Fri Apr 17 09:36:54 2015 -0700
@@ -524,6 +524,33 @@
 
 RET
 
+;-----------------------------------------------------------------------------
+; void interp_4tap_horiz_pp_4x16(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------
+INIT_XMM sse3
+cglobal interp_4tap_horiz_pp_4x16, 4, 6, 8, src, srcstride, dst, dststride
+mov         r4d,        r4m
+mova        m7,         [pw_32]
+
+%ifdef PIC
+lea         r5,         [tabw_ChromaCoeff]
+movddup     m4,         [r5 + r4 * 8]
+%else
+movddup     m4,         [tabw_ChromaCoeff + r4 * 8]
+%endif
+
+%assign x 1
+%rep 8
+FILTER_H4_w4_2_sse2
+%if x < 8
+lea         srcq,       [srcq + srcstrideq * 2]
+lea         dstq,       [dstq + dststrideq * 2]
+%endif
+%assign x x+1
+%endrep
+
+RET
+
 %macro FILTER_H4_w2_2 3
     movh        %2, [srcq - 1]
     pshufb      %2, %2, Tm0
diff -r 30ecb4d9ee23 -r ca6ecc17db77 source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h	Fri Apr 17 09:33:03 2015 -0700
+++ b/source/common/x86/ipfilter8.h	Fri Apr 17 09:36:54 2015 -0700
@@ -769,6 +769,7 @@
 void x265_interp_4tap_horiz_pp_4x2_sse3(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
 void x265_interp_4tap_horiz_pp_4x4_sse3(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
 void x265_interp_4tap_horiz_pp_4x8_sse3(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_horiz_pp_4x16_sse3(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
 #undef LUMA_FILTERS
 #undef LUMA_SP_FILTERS
 #undef LUMA_SS_FILTERS


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