[x265] [PATCH 104 of 307] x86: AVX512 interp_4tap_horiz_pp_16xN for high bit depth
mythreyi at multicorewareinc.com
mythreyi at multicorewareinc.com
Sat Apr 7 04:31:42 CEST 2018
# HG changeset patch
# User Vignesh Vijayakumar
# Date 1504164819 -19800
# Thu Aug 31 13:03:39 2017 +0530
# Node ID 052b8b5061d84b791489c01e114a0441f96e4ec2
# Parent e5efe0bdbe0feef4588e29c81bee16651351c50f
x86: AVX512 interp_4tap_horiz_pp_16xN for high bit depth
Color Space i444
Size | AVX2 performance | AVX512 performance
----------------------------------------------
16x4 | 7.22x | 12.70x
16x8 | 6.60x | 17.58x
16x12 | 6.48x | 16.78x
16x16 | 6.12x | 17.11x
16x32 | 6.24x | 18.56x
16x64 | 6.35x | 18.10x
diff -r e5efe0bdbe0f -r 052b8b5061d8 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu Aug 31 11:59:43 2017 +0530
+++ b/source/common/x86/asm-primitives.cpp Thu Aug 31 13:03:39 2017 +0530
@@ -2354,16 +2354,32 @@
p.cu[BLOCK_32x32].copy_cnt = PFX(copy_cnt_32_avx512);
p.cu[BLOCK_16x16].copy_cnt = PFX(copy_cnt_16_avx512);
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_16x4].filter_hpp = PFX(interp_4tap_horiz_pp_16x4_avx512);
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_16x8].filter_hpp = PFX(interp_4tap_horiz_pp_16x8_avx512);
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_16x12].filter_hpp = PFX(interp_4tap_horiz_pp_16x12_avx512);
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_16x16].filter_hpp = PFX(interp_4tap_horiz_pp_16x16_avx512);
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_16x32].filter_hpp = PFX(interp_4tap_horiz_pp_16x32_avx512);
p.chroma[X265_CSP_I420].pu[CHROMA_420_32x8].filter_hpp = PFX(interp_4tap_horiz_pp_32x8_avx512);
p.chroma[X265_CSP_I420].pu[CHROMA_420_32x16].filter_hpp = PFX(interp_4tap_horiz_pp_32x16_avx512);
p.chroma[X265_CSP_I420].pu[CHROMA_420_32x24].filter_hpp = PFX(interp_4tap_horiz_pp_32x24_avx512);
p.chroma[X265_CSP_I420].pu[CHROMA_420_32x32].filter_hpp = PFX(interp_4tap_horiz_pp_32x32_avx512);
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_16x8].filter_hpp = PFX(interp_4tap_horiz_pp_16x8_avx512);
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_16x16].filter_hpp = PFX(interp_4tap_horiz_pp_16x16_avx512);
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_16x24].filter_hpp = PFX(interp_4tap_horiz_pp_16x24_avx512);
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_16x32].filter_hpp = PFX(interp_4tap_horiz_pp_16x32_avx512);
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_16x64].filter_hpp = PFX(interp_4tap_horiz_pp_16x64_avx512);
p.chroma[X265_CSP_I422].pu[CHROMA_422_32x16].filter_hpp = PFX(interp_4tap_horiz_pp_32x16_avx512);
p.chroma[X265_CSP_I422].pu[CHROMA_422_32x32].filter_hpp = PFX(interp_4tap_horiz_pp_32x32_avx512);
p.chroma[X265_CSP_I422].pu[CHROMA_422_32x48].filter_hpp = PFX(interp_4tap_horiz_pp_32x48_avx512);
p.chroma[X265_CSP_I422].pu[CHROMA_422_32x64].filter_hpp = PFX(interp_4tap_horiz_pp_32x64_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_16x4].filter_hpp = PFX(interp_4tap_horiz_pp_16x4_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_16x8].filter_hpp = PFX(interp_4tap_horiz_pp_16x8_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_16x12].filter_hpp = PFX(interp_4tap_horiz_pp_16x12_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_16x16].filter_hpp = PFX(interp_4tap_horiz_pp_16x16_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_16x32].filter_hpp = PFX(interp_4tap_horiz_pp_16x32_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_16x64].filter_hpp = PFX(interp_4tap_horiz_pp_16x64_avx512);
p.chroma[X265_CSP_I444].pu[LUMA_32x8].filter_hpp = PFX(interp_4tap_horiz_pp_32x8_avx512);
p.chroma[X265_CSP_I444].pu[LUMA_32x16].filter_hpp = PFX(interp_4tap_horiz_pp_32x16_avx512);
p.chroma[X265_CSP_I444].pu[LUMA_32x24].filter_hpp = PFX(interp_4tap_horiz_pp_32x24_avx512);
diff -r e5efe0bdbe0f -r 052b8b5061d8 source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm Thu Aug 31 11:59:43 2017 +0530
+++ b/source/common/x86/ipfilter16.asm Thu Aug 31 13:03:39 2017 +0530
@@ -5082,6 +5082,42 @@
;-------------------------------------------------------------------------------------------------------------
;ipfilter_chroma_avx512 code start
;-------------------------------------------------------------------------------------------------------------
+%macro PROCESS_IPFILTER_CHROMA_PP_16x2_AVX512 0
+ ; register map
+ ; m0 , m1 interpolate coeff
+ ; m2 , m3 shuffle order table
+ ; m4 - pd_32
+ ; m5 - zero
+ ; m6 - pw_pixel_max
+
+ movu ym7, [r0]
+ vinserti32x8 m7, [r0 + r1], 1
+ movu ym8, [r0 + 8]
+ vinserti32x8 m8, [r0 + r1 + 8], 1
+
+ pshufb m9, m7, m3
+ pshufb m7, m2
+ pmaddwd m7, m0
+ pmaddwd m9, m1
+ paddd m7, m9
+ paddd m7, m4
+ psrad m7, 6
+
+ pshufb m9, m8, m3
+ pshufb m8, m2
+ pmaddwd m8, m0
+ pmaddwd m9, m1
+ paddd m8, m9
+ paddd m8, m4
+ psrad m8, 6
+
+ packusdw m7, m8
+ CLIPW m7, m5, m6
+ pshufb m7, m10
+ movu [r2], ym7
+ vextracti32x8 [r2 + r3], m7, 1
+%endmacro
+
%macro PROCESS_IPFILTER_CHROMA_PP_32x2_AVX512 0
; register map
; m0 , m1 interpolate coeff
@@ -5247,6 +5283,45 @@
; void interp_4tap_horiz_pp(pixel *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx
;-------------------------------------------------------------------------------------------------------------
INIT_ZMM avx512
+%macro IPFILTER_CHROMA_AVX512_16xN 1
+cglobal interp_4tap_horiz_pp_16x%1, 5,6,11
+ add r1d, r1d
+ add r3d, r3d
+ sub r0, 2
+ mov r4d, r4m
+%ifdef PIC
+ lea r5, [tab_ChromaCoeff]
+ vpbroadcastd m0, [r5 + r4 * 8]
+ vpbroadcastd m1, [r5 + r4 * 8 + 4]
+%else
+ vpbroadcastd m0, [tab_ChromaCoeff + r4 * 8]
+ vpbroadcastd m1, [tab_ChromaCoeff + r4 * 8 + 4]
+%endif
+ vbroadcasti32x8 m2, [interp8_hpp_shuf1_load_avx512]
+ vbroadcasti32x8 m3, [interp8_hpp_shuf2_load_avx512]
+ vbroadcasti32x8 m4, [pd_32]
+ pxor m5, m5
+ vbroadcasti32x8 m6, [pw_pixel_max]
+ vbroadcasti32x8 m10, [interp8_hpp_shuf1_store_avx512]
+
+%rep %1/2 - 1
+ PROCESS_IPFILTER_CHROMA_PP_16x2_AVX512
+ lea r0, [r0 + 2 * r1]
+ lea r2, [r2 + 2 * r3]
+%endrep
+ PROCESS_IPFILTER_CHROMA_PP_16x2_AVX512
+ RET
+%endmacro
+
+IPFILTER_CHROMA_AVX512_16xN 4
+IPFILTER_CHROMA_AVX512_16xN 8
+IPFILTER_CHROMA_AVX512_16xN 12
+IPFILTER_CHROMA_AVX512_16xN 16
+IPFILTER_CHROMA_AVX512_16xN 24
+IPFILTER_CHROMA_AVX512_16xN 32
+IPFILTER_CHROMA_AVX512_16xN 64
+
+INIT_ZMM avx512
%macro IPFILTER_CHROMA_AVX512_32xN 1
cglobal interp_4tap_horiz_pp_32x%1, 5,6,11
add r1d, r1d
More information about the x265-devel
mailing list