[x264-devel] Fwd: x264 patch review for MIPS processors
Henrik Gramner
henrik at gramner.com
Fri Mar 27 19:40:43 CET 2015
---------- Forwarded message ----------
From: Kaustubh Raste <Kaustubh.Raste at imgtec.com>
Date: Fri, Mar 27, 2015 at 2:16 PM
Subject: x264 patch review for MIPS processors
To: "fiona at x264.com" <fiona at x264.com>, "henrik at gramner.com" <henrik at gramner.com>
Cc: Parag Salasakar <Parag.Salasakar at imgtec.com>, Jaydeep Patil
<Jaydeep.Patil at imgtec.com>, Manojkumar Bhosale
<Manojkumar.Bhosale at imgtec.com>, Rob Isherwood
<Rob.Isherwood at imgtec.com>
Hello,
Imagination Technologies has come up with MIPS Warrior Processor Cores.
More details can be found at-
http://www.imgtec.com/mips/warrior/pclass.asp
http://www.imgtec.com/mips/warrior/iclass.asp
X264 Encoder is optimized using MIPS SIMD for these processor cores.
All recommended tests are ‘passed’ under QEMU-Linux.
We would like to upstream/submit patches to the x264 GIT repository.
We would be doing so in small patches so as to make review process
simple and clear.
As part of this we have submitted first patch for the review -
[x264-devel] [PATCH] Updated configure to detect MIPS platform and set
flags. Added define for MIPS MSA. MSA is SIMD architecture of MIPS.
Flags are added to enable MSA.
Request you to have a look at the same.
Thanks,
Kaustubh Raste
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