[x264-devel] [PATCH] MIPS MSA checkasm updated

Henrik Gramner henrik at gramner.com
Fri May 8 17:50:48 CEST 2015


> +    asm volatile( "move.v $w5, $w11" : "=r"(a) :: "memory" );

My MIPS knowledge is quite limited, but this doesn't look correct.
Isn't the cycle counter located in coprocessor 0 register 9, e.g.
wouldn't "mfc0 %0, $9" be the correct instruction?


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