[x265] [PATCH] asm: 10bpp cpde for pixel_sub_2xN

[murugan at multicorewareinc.com]

# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1386239288 -19800
#      Thu Dec 05 15:58:08 2013 +0530
# Node ID 4f17d311db3e0a58dac851533e5db16b874d6bc2
# Parent  589f43958b63b96c3192967494555e5af9c2cde6
asm: 10bpp cpde for pixel_sub_2xN

diff -r 589f43958b63 -r 4f17d311db3e source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Thu Dec 05 15:20:30 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp	Thu Dec 05 15:58:08 2013 +0530
@@ -570,6 +570,9 @@
 
         p.cvt32to16_shr = x265_cvt32to16_shr_sse2;
         p.cvt16to32_shl = x265_cvt16to32_shl_sse2;
+
+    p.chroma[X265_CSP_I420].sub_ps[LUMA_4x8] = x265_pixel_sub_ps_2x4_sse2;
+    p.chroma[X265_CSP_I420].sub_ps[LUMA_4x16] = x265_pixel_sub_ps_2x8_sse2;
     }
     if (cpuMask & X265_CPU_SSSE3)
     {
diff -r 589f43958b63 -r 4f17d311db3e source/common/x86/pixel-util.h
--- a/source/common/x86/pixel-util.h	Thu Dec 05 15:20:30 2013 +0530
+++ b/source/common/x86/pixel-util.h	Thu Dec 05 15:58:08 2013 +0530
@@ -121,6 +121,7 @@
 
 CHROMA_PIXELSUB_DEF(_sse4);
 LUMA_PIXELSUB_DEF(_sse4);
+CHROMA_PIXELSUB_DEF(_sse2);
 
 #define SETUP_LUMA_PIXELVAR_FUNC(W, H, cpu) \
     uint64_t x265_pixel_var_ ## W ## x ## H ## cpu(pixel * pix, intptr_t pixstride);
diff -r 589f43958b63 -r 4f17d311db3e source/common/x86/pixel-util8.asm
--- a/source/common/x86/pixel-util8.asm	Thu Dec 05 15:20:30 2013 +0530
+++ b/source/common/x86/pixel-util8.asm	Thu Dec 05 15:58:08 2013 +0530
@@ -2072,6 +2072,33 @@
 ;-----------------------------------------------------------------------------
 ; void pixel_sub_ps_c_2x4(int16_t *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
 ;-----------------------------------------------------------------------------
+%if HIGH_BIT_DEPTH
+INIT_XMM sse2
+cglobal pixel_sub_ps_2x4, 6, 6, 8, dest, deststride, src0, src1, srcstride0, srcstride1
+    add      r1,    r1
+    add      r4,    r4
+    add      r5,    r5
+    movd     m0,    [r2]
+    movd     m1,    [r3]
+    movd     m2,    [r2 + r4]
+    movd     m3,    [r3 + r5]
+    movd     m4,    [r2 + 2 * r4]
+    movd     m5,    [r3 + 2 * r5]
+    lea      r2,    [r2 + 2 * r4]
+    lea      r3,    [r3 + 2 * r5]
+    movd     m6,    [r2 + r4]
+    movd     m7,    [r3 + r5]
+    psubw    m0,    m1
+    psubw    m2,    m3
+    psubw    m4,    m5
+    psubw    m6,    m7
+
+    movd     [r0],           m0
+    movd     [r0 + r1],      m2
+    movd     [r0 + 2 * r1],  m4
+    lea      r0,             [r0 + 2 * r1]
+    movd     [r0 + r1],      m6
+%else
 INIT_XMM sse4
 %if ARCH_X86_64
     cglobal pixel_sub_ps_2x4, 6, 8, 0
@@ -2156,12 +2183,63 @@
 sub      t0d,      t1d
 
 mov      [r0 + 2], t0w
-
+%endif
 RET
 
 ;-----------------------------------------------------------------------------
 ; void pixel_sub_ps_c_2x8(int16_t *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
 ;-----------------------------------------------------------------------------
+%if HIGH_BIT_DEPTH
+INIT_XMM sse2
+cglobal pixel_sub_ps_2x8, 6, 6, 8, dest, deststride, src0, src1, srcstride0, srcstride1
+    add      r1,    r1
+    add      r4,    r4
+    add      r5,    r5
+    movd     m0,    [r2]
+    movd     m1,    [r3]
+    movd     m2,    [r2 + r4]
+    movd     m3,    [r3 + r5]
+    movd     m4,    [r2 + 2 * r4]
+    movd     m5,    [r3 + 2 * r5]
+    lea      r2,    [r2 + 2 * r4]
+    lea      r3,    [r3 + 2 * r5]
+    movd     m6,    [r2 + r4]
+    movd     m7,    [r3 + r5]
+    psubw    m0,    m1
+    psubw    m2,    m3
+    psubw    m4,    m5
+    psubw    m6,    m7
+
+    movd     [r0],           m0
+    movd     [r0 + r1],      m2
+    movd     [r0 + 2 * r1],  m4
+    lea      r0,             [r0 + 2 * r1]
+    movd     [r0 + r1],      m6
+
+    movd     m0,    [r2 + 2 * r4]
+    movd     m1,    [r3 + 2 * r5]
+    lea      r2,    [r2 + 2 * r4]
+    lea      r3,    [r3 + 2 * r5]
+    movd     m2,    [r2 + r4]
+    movd     m3,    [r3 + r5]
+    movd     m4,    [r2 + 2 * r4]
+    movd     m5,    [r3 + 2 * r5]
+    lea      r2,    [r2 + 2 * r4]
+    lea      r3,    [r3 + 2 * r5]
+    movd     m6,    [r2 + r4]
+    movd     m7,    [r3 + r5]
+    psubw    m0,    m1
+    psubw    m2,    m3
+    psubw    m4,    m5
+    psubw    m6,    m7
+
+    movd     [r0 + 2 * r1],  m0
+    lea      r0,             [r0 + 2 * r1]
+    movd     [r0 + r1],      m2
+    movd     [r0 + 2 * r1],  m4
+    lea      r0,             [r0 + 2 * r1]
+    movd     [r0 + r1],      m6
+%else
 INIT_XMM sse4
 %if ARCH_X86_64
     cglobal pixel_sub_ps_2x8, 6, 8, 0
@@ -2308,7 +2386,7 @@
     sub      t0d,      t1d
 
     mov      [r0 + 2], t0w
-
+%endif
 RET
 
 ;-----------------------------------------------------------------------------