[x265] [PATCH] 16bpp: assembly code for intra_pred_dc4
dnyaneshwar at multicorewareinc.com
dnyaneshwar at multicorewareinc.com
Fri Dec 6 07:34:06 CET 2013
# HG changeset patch
# User Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
# Date 1386311574 -19800
# Fri Dec 06 12:02:54 2013 +0530
# Node ID cfc21a72b9a33d2e147f412a2a9b7d4120ed422d
# Parent 3e6be1e1172086537ab3fb5aabb7d03ad5ce56fb
16bpp: assembly code for intra_pred_dc4
diff -r 3e6be1e11720 -r cfc21a72b9a3 source/common/CMakeLists.txt
--- a/source/common/CMakeLists.txt Thu Dec 05 22:37:33 2013 -0600
+++ b/source/common/CMakeLists.txt Fri Dec 06 12:02:54 2013 +0530
@@ -109,12 +109,12 @@
if(ENABLE_ASSEMBLY)
set(C_SRCS asm-primitives.cpp pixel.h mc.h ipfilter8.h blockcopy8.h dct8.h)
set(A_SRCS pixel-a.asm const-a.asm cpu-a.asm ssd-a.asm mc-a.asm
- mc-a2.asm ipfilter8.asm pixel-util8.asm blockcopy8.asm intrapred8.asm
+ mc-a2.asm ipfilter8.asm pixel-util8.asm blockcopy8.asm
pixeladd8.asm dct8.asm)
if(HIGH_BIT_DEPTH)
- set(A_SRCS ${A_SRCS} sad16-a.asm)
+ set(A_SRCS ${A_SRCS} sad16-a.asm intrapred16.asm)
else()
- set(A_SRCS ${A_SRCS} sad-a.asm)
+ set(A_SRCS ${A_SRCS} sad-a.asm intrapred8.asm)
endif()
if (NOT X64)
diff -r 3e6be1e11720 -r cfc21a72b9a3 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu Dec 05 22:37:33 2013 -0600
+++ b/source/common/x86/asm-primitives.cpp Fri Dec 06 12:02:54 2013 +0530
@@ -654,6 +654,7 @@
}
if (cpuMask & X265_CPU_SSE4)
{
+ p.intra_pred[BLOCK_4x4][1] = x265_intra_pred_dc4_sse4;
}
if (cpuMask & X265_CPU_XOP)
{
diff -r 3e6be1e11720 -r cfc21a72b9a3 source/common/x86/const-a.asm
--- a/source/common/x86/const-a.asm Thu Dec 05 22:37:33 2013 -0600
+++ b/source/common/x86/const-a.asm Fri Dec 06 12:02:54 2013 +0530
@@ -36,6 +36,7 @@
const pw_32, times 16 dw 32
const pw_512, times 16 dw 512
const pw_1024, times 16 dw 1024
+const pw_4096, times 16 dw 4096
const pw_00ff, times 16 dw 0x00ff
const pw_pixel_max,times 16 dw ((1 << BIT_DEPTH)-1)
const pd_1, times 8 dd 1
diff -r 3e6be1e11720 -r cfc21a72b9a3 source/common/x86/intrapred16.asm
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/source/common/x86/intrapred16.asm Fri Dec 06 12:02:54 2013 +0530
@@ -0,0 +1,100 @@
+;*****************************************************************************
+;* Copyright (C) 2013 x265 project
+;*
+;* Authors: Dnyaneshwar Gorade <dnyaneshwar at multicorewareinc.com>
+;*
+;* This program is free software; you can redistribute it and/or modify
+;* it under the terms of the GNU General Public License as published by
+;* the Free Software Foundation; either version 2 of the License, or
+;* (at your option) any later version.
+;*
+;* This program is distributed in the hope that it will be useful,
+;* but WITHOUT ANY WARRANTY; without even the implied warranty of
+;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;* GNU General Public License for more details.
+;*
+;* You should have received a copy of the GNU General Public License
+;* along with this program; if not, write to the Free Software
+;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
+;*
+;* This program is also available under a commercial proprietary license.
+;* For more information, contact us at licensing at multicorewareinc.com.
+;*****************************************************************************/
+
+%include "x86inc.asm"
+%include "x86util.asm"
+
+SECTION_RODATA 32
+
+SECTION .text
+
+cextern pw_4096
+
+
+;-------------------------------------------------------------------------------------------------------
+; void intra_pred_dc(pixel* dst, intptr_t dstStride, pixel* left, pixel* above, int dirMode, int filter)
+;-------------------------------------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal intra_pred_dc4, 4,6,2
+ mov r4d, r5m
+ add r2, 2
+ add r3, 2
+
+ movh m0, [r3] ; sumAbove
+ movh m1, [r2] ; sumLeft
+
+ paddw m0, m1
+ pshufd m1, m0, 1
+ paddw m0, m1
+ phaddw m0, m0 ; m0 = sum
+
+ test r4d, r4d
+
+ pmulhrsw m0, [pw_4096] ; m0 = (sum + 4) / 8
+ movd r4d, m0 ; r4d = dc_val
+ movzx r4d, r4w
+ pshuflw m0, m0, 0 ; m0 = word [dc_val ...]
+
+ ; store DC 4x4
+ movh [r0], m0
+ movh [r0 + r1 * 2], m0
+ movh [r0 + r1 * 4], m0
+ lea r5, [r0 + r1 * 4]
+ movh [r5 + r1 * 2], m0
+
+ ; do DC filter
+ jz .end
+ lea r5d, [r4d * 2 + 2] ; r5d = DC * 2 + 2
+ add r4d, r5d ; r4d = DC * 3 + 2
+ movd m0, r4d
+ pshuflw m0, m0, 0 ; m0 = pixDCx3
+
+ ; filter top
+ movu m1, [r3]
+ paddw m1, m0
+ psraw m1, 2
+ movh [r0], m1 ; overwrite top-left pixel, we will update it later
+
+ ; filter top-left
+ movzx r3d, word [r3]
+ add r5d, r3d
+ movzx r3d, word [r2]
+ add r3d, r5d
+ shr r3d, 2
+ mov [r0], r3w
+
+ ; filter left
+ lea r0, [r0 + r1 * 2]
+ movu m1, [r2 + 2]
+ paddw m1, m0
+ psraw m1, 2
+ movd r3d, m1
+ mov [r0], r3w
+ shr r3d, 16
+ mov [r0 + r1 * 2], r3w
+ pextrw [r0 + r1 * 4], m1, 2
+
+.end:
+
+ RET
+
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