[x265] [PATCH] 16bpp: assembly code for intra_pred_dc16
dnyaneshwar at multicorewareinc.com
dnyaneshwar at multicorewareinc.com
Fri Dec 6 10:37:43 CET 2013
# HG changeset patch
# User Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
# Date 1386322437 -19800
# Fri Dec 06 15:03:57 2013 +0530
# Node ID 53c7147e0e34ec247ab0c9f355c11245773e2fcf
# Parent d2a6fa8204436c3eecbd9342d6091471a216ceaa
16bpp: assembly code for intra_pred_dc16
diff -r d2a6fa820443 -r 53c7147e0e34 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Fri Dec 06 14:36:06 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp Fri Dec 06 15:03:57 2013 +0530
@@ -656,6 +656,7 @@
{
p.intra_pred[BLOCK_4x4][1] = x265_intra_pred_dc4_sse4;
p.intra_pred[BLOCK_8x8][1] = x265_intra_pred_dc8_sse4;
+ p.intra_pred[BLOCK_16x16][1] = x265_intra_pred_dc16_sse4;
}
if (cpuMask & X265_CPU_XOP)
{
diff -r d2a6fa820443 -r 53c7147e0e34 source/common/x86/intrapred16.asm
--- a/source/common/x86/intrapred16.asm Fri Dec 06 14:36:06 2013 +0530
+++ b/source/common/x86/intrapred16.asm Fri Dec 06 15:03:57 2013 +0530
@@ -180,3 +180,140 @@
.end
RET
+
+;-------------------------------------------------------------------------------------------------------
+; void intra_pred_dc(pixel* dst, intptr_t dstStride, pixel* left, pixel* above, int dirMode, int filter)
+;-------------------------------------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal intra_pred_dc16, 4, 7, 4
+ mov r4d, r5m
+ add r2, 2
+ add r3, 2
+ add r1, r1
+ movu m0, [r3]
+ movu m1, [r3 + 16]
+ movu m2, [r2]
+ movu m3, [r2 + 16]
+
+ paddw m0, m1
+ paddw m2, m3
+ paddw m0, m2
+ movhlps m1, m0
+ paddw m0, m1
+ phaddw m0, m0
+ pmaddwd m0, [pw_1]
+
+ movd r5d, m0
+ add r5d, 16
+ shr r5d, 5 ; sum = sum / 16
+ movd m1, r5d
+ pshuflw m1, m1, 0 ; m1 = word [dc_val ...]
+ pshufd m1, m1, 0
+
+ test r4d, r4d
+
+ ; store DC 16x16
+ mov r6, r0
+ movu [r0], m1
+ movu [r0 + 16], m1
+ movu [r0 + r1], m1
+ movu [r0 + 16 + r1], m1
+ lea r0, [r0 + r1 * 2]
+ movu [r0], m1
+ movu [r0 + 16], m1
+ movu [r0 + r1], m1
+ movu [r0 + 16 + r1], m1
+ lea r0, [r0 + r1 * 2]
+ movu [r0], m1
+ movu [r0 + 16], m1
+ movu [r0 + r1], m1
+ movu [r0 + 16 + r1], m1
+ lea r0, [r0 + r1 * 2]
+ movu [r0], m1
+ movu [r0 + 16], m1
+ movu [r0 + r1], m1
+ movu [r0 + 16 + r1], m1
+ lea r0, [r0 + r1 * 2]
+ movu [r0], m1
+ movu [r0 + 16], m1
+ movu [r0 + r1], m1
+ movu [r0 + 16 + r1], m1
+ lea r0, [r0 + r1 * 2]
+ movu [r0], m1
+ movu [r0 + 16], m1
+ movu [r0 + r1], m1
+ movu [r0 + 16 + r1], m1
+ lea r0, [r0 + r1 * 2]
+ movu [r0], m1
+ movu [r0 + 16], m1
+ movu [r0 + r1], m1
+ movu [r0 + 16 + r1], m1
+ lea r0, [r0 + r1 * 2]
+ movu [r0], m1
+ movu [r0 + 16], m1
+ movu [r0 + r1], m1
+ movu [r0 + 16 + r1], m1
+
+ ; Do DC Filter
+ jz .end
+ lea r4d, [r5d * 2 + 2] ; r4d = DC * 2 + 2
+ add r5d, r4d ; r5d = DC * 3 + 2
+ movd m1, r5d
+ pshuflw m1, m1, 0 ; m1 = pixDCx3
+ pshufd m1, m1, 0
+
+ ; filter top
+ movu m2, [r3]
+ paddw m2, m1
+ psraw m2, 2
+ movu [r6], m2
+ movu m3, [r3 + 16]
+ paddw m3, m1
+ psraw m3, 2
+ movu [r6 + 16], m3
+
+ ; filter top-left
+ movzx r3d, word [r3]
+ add r4d, r3d
+ movzx r3d, word [r2]
+ add r3d, r4d
+ shr r3d, 2
+ mov [r6], r3w
+
+ ; filter left
+ add r6, r1
+ movu m2, [r2 + 2]
+ paddw m2, m1
+ psraw m2, 2
+
+ pextrw [r6], m2, 0
+ pextrw [r6 + r1], m2, 1
+ lea r6, [r6 + r1 * 2]
+ pextrw [r6], m2, 2
+ pextrw [r6 + r1], m2, 3
+ lea r6, [r6 + r1 * 2]
+ pextrw [r6], m2, 4
+ pextrw [r6 + r1], m2, 5
+ lea r6, [r6 + r1 * 2]
+ pextrw [r6], m2, 6
+ pextrw [r6 + r1], m2, 7
+
+ lea r6, [r6 + r1 * 2]
+ movu m3, [r2 + 18]
+ paddw m3, m1
+ psraw m3, 2
+
+ pextrw [r6], m3, 0
+ pextrw [r6 + r1], m3, 1
+ lea r6, [r6 + r1 * 2]
+ pextrw [r6], m3, 2
+ pextrw [r6 + r1], m3, 3
+ lea r6, [r6 + r1 * 2]
+ pextrw [r6], m3, 4
+ pextrw [r6 + r1], m3, 5
+ lea r6, [r6 + r1 * 2]
+ pextrw [r6], m3, 6
+
+.end
+ RET
+
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