[x265] [PATCH] asm: 10bpp code for pixel_add_ps_6x8

chen chenm003 at 163.com
Mon Dec 9 10:14:01 CET 2013


>diff -r 5bb46ef28bc5 -r 02b888130ed4 source/common/x86/pixeladd8.asm
>--- a/source/common/x86/pixeladd8.asm Mon Dec 09 10:59:45 2013 +0800
>+++ b/source/common/x86/pixeladd8.asm Mon Dec 09 12:13:29 2013 +0530
>@@ -364,6 +364,75 @@
> ; void pixel_add_ps_%1x%2(pixel *dest, intptr_t destride, pixel *src0, int16_t *scr1, intptr_t srcStride0, intptr_t srcStride1)
> ;-----------------------------------------------------------------------------
> %macro PIXEL_ADD_PS_W6_H4 2
>+%if HIGH_BIT_DEPTH
>+INIT_XMM sse2
>+cglobal pixel_add_ps_%1x%2, 6, 7, 6, dest, destride, src0, scr1, srcStride0, srcStride1
>+    mov     r6d,    %2/4
>+    add      r1,    r1
>+    add      r4,    r4
>+    add      r5,    r5
>+    pxor     m4,    m4
>+    mova     m5,    [pw_pixel_max]
>+.loop
>+    movu        m0,    [r2]
>+    movu        m1,    [r3]
>+    mova        m2,    m0
>+    mova        m3,    m1
>+    punpckhqdq  m2,    m2
>+    punpckhqdq  m3,    m3
punpckhqdq m2, m0, m0
write like this will more performance on AVX, of course, you don't need it, see below
 
>+    paddw       m0,    m1
>+    paddw       m2,    m3
the latest paddw can process 8 pixels, so you don't need m2m3

>+    CLIPW       m0,    m4,    m5
>+    CLIPW       m2,    m4,    m5
>+
>+    movh        [r0],         m0
>+    movd        [r0 + 8],     m2
SSE4: pextrd [r0+8],m0,2
SSE2: pshufd m0, 2 + movd

 
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