[x265] [PATCH] asm: 16bpp asm code for intra_pred_ang4_4
yuvaraj at multicorewareinc.com
yuvaraj at multicorewareinc.com
Mon Dec 9 11:29:30 CET 2013
# HG changeset patch
# User Yuvaraj Venkatesh <yuvaraj at multicorewareinc.com>
# Date 1386584931 -19800
# Mon Dec 09 15:58:51 2013 +0530
# Node ID 721dbb9393998858a29be037afab6f73c882eb1e
# Parent d61cbc3d30e612913320e407280bae0057f310d0
asm: 16bpp asm code for intra_pred_ang4_4
diff -r d61cbc3d30e6 -r 721dbb939399 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Mon Dec 09 15:33:39 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp Mon Dec 09 15:58:51 2013 +0530
@@ -687,6 +687,8 @@
p.intra_pred[BLOCK_32x32][1] = x265_intra_pred_dc32_sse4;
SETUP_INTRA_ANG4(3, 3, sse4);
+ SETUP_INTRA_ANG4(4, 4, sse4);
+ SETUP_INTRA_ANG4(32, 4, sse4);
SETUP_INTRA_ANG4(33, 3, sse4);
}
if (cpuMask & X265_CPU_XOP)
diff -r d61cbc3d30e6 -r 721dbb939399 source/common/x86/intrapred16.asm
--- a/source/common/x86/intrapred16.asm Mon Dec 09 15:33:39 2013 +0530
+++ b/source/common/x86/intrapred16.asm Mon Dec 09 15:58:51 2013 +0530
@@ -448,7 +448,6 @@
mova m6, [r3 - 6 * 16] ; [14]
mova m7, [r3 - 12 * 16] ; [ 8]
-ALIGN 32
.do_filter4x4:
pmaddwd m2, m0
paddd m2, [pd_16]
@@ -484,3 +483,22 @@
lea r1, [r1 * 3]
movhps [r0 + r1], m4
RET
+
+cglobal intra_pred_ang4_4, 3,4,8
+ cmp r4m, byte 32
+ cmove r2, r3mp
+ lea r3, [ang_table + 18 * 16]
+ movu m0, [r2 + 2] ; [8 7 6 5 4 3 2 1]
+ palignr m1, m0, 2 ; [x 8 7 6 5 4 3 2]
+ punpcklwd m2, m0, m1 ; [5 4 4 3 3 2 2 1]
+ palignr m6, m0, 4 ; [x x 8 7 6 5 4 3]
+ punpcklwd m3, m1, m6 ; [6 5 5 4 4 3 3 2]
+ mova m4, m3
+ palignr m7, m0, 6 ; [x x x 8 7 6 5 4]
+ punpcklwd m5, m6, m7 ; [7 6 6 5 5 4 4 3]
+
+ mova m0, [r3 + 3 * 16] ; [21]
+ mova m1, [r3 - 8 * 16] ; [10]
+ mova m6, [r3 + 13 * 16] ; [31]
+ mova m7, [r3 + 2 * 16] ; [20]
+ jmp mangle(private_prefix %+ _ %+ intra_pred_ang4_3 %+ SUFFIX %+ .do_filter4x4)
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