[x265] [PATCH Review only] asm: pixel_add_pp routine for block sizes 8x8, 8x16 and 8x32
murugan at multicorewareinc.com
murugan at multicorewareinc.com
Tue Nov 5 13:15:01 CET 2013
# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1383653659 -19800
# Tue Nov 05 17:44:19 2013 +0530
# Node ID d9505240b748ffe5ce523905097f0d53a9ff7943
# Parent 264f215c3503097b8ec4cebfaade85caaa540048
asm: pixel_add_pp routine for block sizes 8x8, 8x16 and 8x32
diff -r 264f215c3503 -r d9505240b748 source/common/x86/pixel-add8.asm
--- a/source/common/x86/pixel-add8.asm Tue Nov 05 17:39:46 2013 +0530
+++ b/source/common/x86/pixel-add8.asm Tue Nov 05 17:44:19 2013 +0530
@@ -127,3 +127,58 @@
%endmacro
PIXELADD_PP_W8_H2 8, 6
+
+;-----------------------------------------------------------------------------
+; void pixel_add_pp_c_%1x%2(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
+;-----------------------------------------------------------------------------
+%macro PIXELADD_PP_W8_H4 2
+INIT_XMM sse2
+cglobal pixel_add_pp_%1x%2, 4, 7, 8, dest, deststride, src0, src1
+
+mov r4d, r4m
+mov r5d, r5m
+mov r6d, %2
+
+.loop
+
+ movh m0, [r2]
+ movh m1, [r3]
+
+ movh m2, [r2 + r4]
+ movh m3, [r3 + r5]
+
+ movh m4, [r2 + 2 * r4]
+ movh m5, [r3 + 2 * r5]
+
+ lea r2, [r2 + 2 * r4]
+ lea r3, [r3 + 2 * r5]
+
+ movh m6, [r2 + r4]
+ movh m7, [r3 + r5]
+
+ paddusb m0, m1
+ paddusb m2, m3
+ paddusb m4, m5
+ paddusb m6, m7
+
+ movh [r0], m0
+ movh [r0 + r1], m2
+ movh [r0 + 2 * r1], m4
+
+ lea r0, [r0 + 2 * r1]
+ movh [r0 + r1], m6
+
+ lea r2, [r2 + 2 * r4]
+ lea r3, [r3 + 2 * r5]
+ lea r0, [r0 + 2 * r1]
+
+ sub r6d, 4
+
+jnz .loop
+
+RET
+%endmacro
+
+PIXELADD_PP_W8_H4 8, 8
+PIXELADD_PP_W8_H4 8, 16
+PIXELADD_PP_W8_H4 8, 32
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