[x265] [PATCH Review only] asm: pixel_add_pp routine for 4x4 block size

[murugan at multicorewareinc.com]

# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1383714538 -19800
#      Wed Nov 06 10:38:58 2013 +0530
# Node ID 6962205fc367a09d02fa2210fa97de80fac80af0
# Parent  d48bb6fa5ea4c58bb499d40681c941d0774237b4
asm: pixel_add_pp routine for 4x4 block size

diff -r d48bb6fa5ea4 -r 6962205fc367 source/common/x86/pixel-add8.asm
--- a/source/common/x86/pixel-add8.asm	Tue Nov 05 18:55:17 2013 +0530
+++ b/source/common/x86/pixel-add8.asm	Wed Nov 06 10:38:58 2013 +0530
@@ -53,6 +53,44 @@
 RET
 
 ;-----------------------------------------------------------------------------
+; void pixel_add_pp_c_4x4(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
+;-----------------------------------------------------------------------------
+INIT_XMM sse2
+cglobal pixel_add_pp_4x4, 4, 6, 8, dest, deststride, src0, src1
+
+mov        r4d,        r4m
+mov        r5d,        r5m
+
+movd       m0,    [r2]
+movd       m1,    [r3]
+
+movd       m2,    [r2 + r4]
+movd       m3,    [r3 + r5]
+
+movd       m4,    [r2 + 2 * r4]
+movd       m5,    [r3 + 2 * r5]
+
+lea        r2,    [r2 + 2 * r4]
+lea        r3,    [r3 + 2 * r5]
+
+movd       m6,    [r2 +  r4]
+movd       m7,    [r3 +  r5]
+
+paddusb    m0,    m1
+paddusb    m2,    m3
+paddusb    m4,    m5
+paddusb    m6,    m7
+
+movd    [r0],             m0
+movd    [r0 + r1],        m2
+movd    [r0 + 2 * r1],    m4
+
+lea     r0,               [r0 + 2 * r1]
+movd    [r0 + r1],        m6
+
+RET
+
+;-----------------------------------------------------------------------------
 ; void pixel_add_pp_c_8x2(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
 ;-----------------------------------------------------------------------------
 INIT_XMM sse2