[x265] [PATCH Review only] asm: pixel_add_pp routine for block sizes 4x8 and 4x16
murugan at multicorewareinc.com
murugan at multicorewareinc.com
Wed Nov 6 07:08:39 CET 2013
# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1383718053 -19800
# Wed Nov 06 11:37:33 2013 +0530
# Node ID 6b08828ab11c4b5e0244faea9187f162d04e615c
# Parent 6962205fc367a09d02fa2210fa97de80fac80af0
asm: pixel_add_pp routine for block sizes 4x8 and 4x16
diff -r 6962205fc367 -r 6b08828ab11c source/common/x86/pixel-add8.asm
--- a/source/common/x86/pixel-add8.asm Wed Nov 06 10:38:58 2013 +0530
+++ b/source/common/x86/pixel-add8.asm Wed Nov 06 11:37:33 2013 +0530
@@ -91,6 +91,60 @@
RET
;-----------------------------------------------------------------------------
+; void pixel_add_pp_c_%1x%2(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
+;-----------------------------------------------------------------------------
+%macro PIXELADD_PP_W4_H4 2
+INIT_XMM sse2
+cglobal pixel_add_pp_%1x%2, 4, 7, 8, dest, deststride, src0, src1
+
+mov r4d, r4m
+mov r5d, r5m
+mov r6d, %2
+
+.loop
+
+ movd m0, [r2]
+ movd m1, [r3]
+
+ movd m2, [r2 + r4]
+ movd m3, [r3 + r5]
+
+ movd m4, [r2 + 2 * r4]
+ movd m5, [r3 + 2 * r5]
+
+ lea r2, [r2 + 2 * r4]
+ lea r3, [r3 + 2 * r5]
+
+ movd m6, [r2 + r4]
+ movd m7, [r3 + r5]
+
+ paddusb m0, m1
+ paddusb m2, m3
+ paddusb m4, m5
+ paddusb m6, m7
+
+ movd [r0], m0
+ movd [r0 + r1], m2
+ movd [r0 + 2 * r1], m4
+
+ lea r0, [r0 + 2 * r1]
+ movd [r0 + r1], m6
+
+ lea r2, [r2 + 2 * r4]
+ lea r3, [r3 + 2 * r5]
+ lea r0, [r0 + 2 * r1]
+
+ sub r6d, 4
+
+jnz .loop
+
+RET
+%endmacro
+
+PIXELADD_PP_W4_H4 4, 8
+PIXELADD_PP_W4_H4 4, 16
+
+;-----------------------------------------------------------------------------
; void pixel_add_pp_c_8x2(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
;-----------------------------------------------------------------------------
INIT_XMM sse2
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