[x265] [PATCH Review only] asm: pixel_add_pp routine for block sizes 16x8, 16x12, 16x16, 16x32 and 16x64
murugan at multicorewareinc.com
murugan at multicorewareinc.com
Wed Nov 6 07:32:32 CET 2013
# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1383719523 -19800
# Wed Nov 06 12:02:03 2013 +0530
# Node ID 4f1d081e7317608eda7db8ce86f72c40568217f9
# Parent d8385d7126cb3e32a19661f50a9dd850bfdc8b39
asm: pixel_add_pp routine for block sizes 16x8, 16x12, 16x16, 16x32 and 16x64
diff -r d8385d7126cb -r 4f1d081e7317 source/common/x86/pixel-add8.asm
--- a/source/common/x86/pixel-add8.asm Wed Nov 06 11:47:57 2013 +0530
+++ b/source/common/x86/pixel-add8.asm Wed Nov 06 12:02:03 2013 +0530
@@ -335,3 +335,61 @@
movu [r0 + r1], m6
RET
+
+;-----------------------------------------------------------------------------
+; void pixel_add_pp_c_%1x%2(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
+;-----------------------------------------------------------------------------
+%macro PIXELADD_PP_W16_H4 2
+INIT_XMM sse2
+cglobal pixel_add_pp_%1x%2, 4, 7, 8, dest, deststride, src0, src1
+
+mov r4d, r4m
+mov r5d, r5m
+mov r6d, %2
+
+.loop
+
+ movu m0, [r2]
+ movu m1, [r3]
+
+ movu m2, [r2 + r4]
+ movu m3, [r3 + r5]
+
+ movu m4, [r2 + 2 * r4]
+ movu m5, [r3 + 2 * r5]
+
+ lea r2, [r2 + 2 * r4]
+ lea r3, [r3 + 2 * r5]
+
+ movu m6, [r2 + r4]
+ movu m7, [r3 + r5]
+
+ paddusb m0, m1
+ paddusb m2, m3
+ paddusb m4, m5
+ paddusb m6, m7
+
+ movu [r0], m0
+ movu [r0 + r1], m2
+ movu [r0 + 2 * r1], m4
+
+ lea r0, [r0 + 2 * r1]
+ movu [r0 + r1], m6
+
+ lea r2, [r2 + 2 * r4]
+ lea r3, [r3 + 2 * r5]
+ lea r0, [r0 + 2 * r1]
+
+ sub r6d, 4
+
+jnz .loop
+
+RET
+%endmacro
+
+PIXELADD_PP_W16_H4 16, 8
+PIXELADD_PP_W16_H4 16, 12
+PIXELADD_PP_W16_H4 16, 16
+PIXELADD_PP_W16_H4 16, 32
+PIXELADD_PP_W16_H4 16, 64
+
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