[x265] [PATCH Review only] asm: pixel_add_pp routine for 12x16 block size
murugan at multicorewareinc.com
murugan at multicorewareinc.com
Wed Nov 6 08:30:22 CET 2013
# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1383722997 -19800
# Wed Nov 06 12:59:57 2013 +0530
# Node ID e025d0e905a28d8517bd13303d157a6139ded651
# Parent 8678998ac66c1e1bfe2f40ac163a82609fcf14c5
asm: pixel_add_pp routine for 12x16 block size
diff -r 8678998ac66c -r e025d0e905a2 source/common/x86/pixel-add8.asm
--- a/source/common/x86/pixel-add8.asm Wed Nov 06 12:48:08 2013 +0530
+++ b/source/common/x86/pixel-add8.asm Wed Nov 06 12:59:57 2013 +0530
@@ -299,6 +299,52 @@
PIXELADD_PP_W8_H4 8, 32
;-----------------------------------------------------------------------------
+; void pixel_add_pp_c_%1x%2(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
+;-----------------------------------------------------------------------------
+%macro PIXELADD_PP_W12_H2 2
+INIT_XMM sse2
+cglobal pixel_add_pp_%1x%2, 4, 7, 8, dest, deststride, src0, src1
+
+mov r4d, r4m
+mov r5d, r5m
+mov r6d, %2
+
+.loop
+
+ movh m0, [r2]
+ movd m1, [r2 + 8]
+ movh m2, [r3]
+ movd m3, [r3 + 8]
+
+ movh m4, [r2 + r4]
+ movd m5, [r2 + r4 + 8]
+ movh m6, [r3 + r5]
+ movd m7, [r3 + r5 + 8]
+
+ paddusb m0, m2
+ paddusb m1, m3
+ paddusb m4, m6
+ paddusb m5, m7
+
+ movh [r0], m0
+ movd [r0 + 8], m1
+ movh [r0 + r1], m4
+ movd [r0 + r1 + 8], m5
+
+ lea r2, [r2 + 2 * r4]
+ lea r3, [r3 + 2 * r5]
+ lea r0, [r0 + 2 * r1]
+
+ sub r6d, 2
+
+jnz .loop
+
+RET
+%endmacro
+
+PIXELADD_PP_W12_H2 12, 16
+
+;-----------------------------------------------------------------------------
; void pixel_add_pp_c_16x4(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
;-----------------------------------------------------------------------------
INIT_XMM sse2
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