[x265] [PATCH Review only] asm: pixel_add_pp routine for 2x4 block size
murugan at multicorewareinc.com
murugan at multicorewareinc.com
Wed Nov 6 11:19:43 CET 2013
# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1383733159 -19800
# Wed Nov 06 15:49:19 2013 +0530
# Node ID 377f4e2848d6fa3143154f0b7e7f35bff93cb6a8
# Parent a29a17c37297387d0e13a9d5223e83c97ac1c281
asm: pixel_add_pp routine for 2x4 block size
diff -r a29a17c37297 -r 377f4e2848d6 source/common/x86/pixel-add8.asm
--- a/source/common/x86/pixel-add8.asm Wed Nov 06 15:00:16 2013 +0530
+++ b/source/common/x86/pixel-add8.asm Wed Nov 06 15:49:19 2013 +0530
@@ -30,6 +30,47 @@
SECTION .text
;-----------------------------------------------------------------------------
+; void pixel_add_pp_c_2x4(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
+;-----------------------------------------------------------------------------
+INIT_XMM sse2
+cglobal pixel_add_pp_2x4, 4, 7, 8, dest, deststride, src0, src1
+
+mov r4d, r4m
+mov r5d, r5m
+
+movd m0, [r2]
+movd m1, [r3]
+
+movd m2, [r2 +r4]
+movd m3, [r3 + r5]
+
+movd m4, [r2 + 2 * r4]
+movd m5, [r3 + 2 * r5]
+
+lea r2, [r2 + 2 * r4]
+lea r3, [r3 + 2 * r5]
+
+movd m6, [r2 + r4]
+movd m7, [r3 + r5]
+
+paddusb m0, m1
+paddusb m2, m3
+paddusb m4, m5
+paddusb m6, m7
+
+movd r6d, m0
+mov [r0], r6w
+movd r6d, m2
+mov [r0 + r1], r6w
+movd r6d, m4
+mov [r0 + 2 * r1], r6w
+movd r6d, m6
+lea r0, [r0 + 2 * r1]
+mov [r0 + r1], r6w
+
+RET
+
+;-----------------------------------------------------------------------------
; void pixel_add_pp_c_4x2(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
;-----------------------------------------------------------------------------
INIT_XMM sse2
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