[x265] [PATCH Review only] asm: pixel_sub_ps routine for 4x4 block size

[murugan at multicorewareinc.com]

# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1383840463 -19800
#      Thu Nov 07 21:37:43 2013 +0530
# Node ID 318720b33850878ff5bb2bbbceb53e53944725ad
# Parent  d3517392c9845395895f6dbd62fb1a009df4df2f
asm: pixel_sub_ps routine for 4x4 block size

diff -r d3517392c984 -r 318720b33850 source/common/x86/pixel-sub8.asm
--- a/source/common/x86/pixel-sub8.asm	Thu Nov 07 21:19:10 2013 +0530
+++ b/source/common/x86/pixel-sub8.asm	Thu Nov 07 21:37:43 2013 +0530
@@ -55,3 +55,52 @@
 movh    [r0 + r1],    m4
 
 RET
+
+;-----------------------------------------------------------------------------
+; void pixel_sub_ps_c_4x4(int16_t *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
+;-----------------------------------------------------------------------------
+INIT_XMM sse2
+cglobal pixel_sub_ps_4x4, 4, 6, 8, dest, deststride, src0, src1
+
+add         r1,     r1
+mov         r4d,    r4m
+mov         r5d,    r5m
+
+movd        m0,     [r2]
+movd        m1,     [r3]
+pmovzxbw    m2,     m0
+pmovzxbw    m3,     m1
+
+movd        m0,     [r2 + r4]
+movd        m1,     [r3 + r5]
+pmovzxbw    m4,     m0
+pmovzxbw    m5,     m1
+
+movd        m0,     [r2 + 2 * r4]
+movd        m1,     [r3 + 2 * r5]
+pmovzxbw    m6,     m0
+pmovzxbw    m7,     m1
+
+psubw       m2,     m3
+psubw       m4,     m5
+psubw       m6,     m7
+
+lea         r2,     [r2 + 2 * r4]
+lea         r3,     [r3 + 2 * r5]
+
+movd        m0,     [r2 + r4]
+movd        m1,     [r3 + r5]
+pmovzxbw    m3,     m0
+pmovzxbw    m5,     m1
+
+psubw       m3,     m5
+
+movh    [r0],             m2
+movh    [r0 + r1],        m4
+movh    [r0 + 2 * r1],    m6
+
+lea     r0,               [r0 + 2 * r1]
+
+movh    [r0 + r1],        m3
+
+RET