[x265] [PATCH] blockcopy_sp_4x8, optimized asm code

praveen at multicorewareinc.com praveen at multicorewareinc.com
Fri Nov 8 10:34:19 CET 2013


# HG changeset patch
# User Praveen Tiwari
# Date 1383903250 -19800
# Node ID 1e6bf52b6e3471b81e636569daa667f6dec9838a
# Parent  44ac213169c906eab5cba6b4aba876391b81da99
blockcopy_sp_4x8, optimized asm code

diff -r 44ac213169c9 -r 1e6bf52b6e34 source/common/x86/blockcopy8.asm
--- a/source/common/x86/blockcopy8.asm	Fri Nov 08 14:46:07 2013 +0530
+++ b/source/common/x86/blockcopy8.asm	Fri Nov 08 15:04:10 2013 +0530
@@ -948,45 +948,42 @@
 ; void blockcopy_sp_4x8(pixel *dest, intptr_t destStride, int16_t *src, intptr_t srcStride)
 ;-----------------------------------------------------------------------------
 INIT_XMM sse2
-cglobal blockcopy_sp_4x8, 4, 6, 8, dest, destStride, src, srcStride
+cglobal blockcopy_sp_4x8, 4, 4, 8, dest, destStride, src, srcStride
 
 add        r3,      r3
 
-mova       m0,      [tab_Vm]
+movh       m0,      [r2]
+movh       m1,      [r2 + r3]
+movh       m2,      [r2 + 2 * r3]
+lea        r2,      [r2 + 2 * r3]
+movh       m3,      [r2 + r3]
+movh       m4,      [r2 + 2 * r3]
+lea        r2,      [r2 + 2 * r3]
+movh       m5,      [r2 + r3]
+movh       m6,      [r2 + 2 * r3]
+lea        r2,      [r2 + 2 * r3]
+movh       m7,      [r2 + r3]
 
-movh       m1,      [r2]
-movh       m2,      [r2 + r3]
-movh       m3,      [r2 + 2 * r3]
-lea        r4,      [r2 + 2 * r3]
-movh       m4,      [r4 + r3]
-movh       m5,      [r4 + 2 * r3]
-lea        r4,      [r4 + 2 * r3]
-movh       m6,      [r4 + r3]
-movh       m7,      [r4 + 2 * r3]
-lea        r5,      [r4 + 2 * r3]
+packuswb   m0,      m1
+packuswb   m2,      m3
+packuswb   m4,      m5
+packuswb   m6,      m7
 
-pshufb     m1,      m0
-pshufb     m2,      m0
-pshufb     m3,      m0
-pshufb     m4,      m0
-pshufb     m5,      m0
-pshufb     m6,      m0
-pshufb     m7,      m0
-
-movd       [r0],            m1
-movd       [r0 + r1],       m2
-movd       [r0 + 2 * r1],   m3
-lea        r4,              [r0 + 2 * r1]
-movd       [r4 + r1],       m4
-movd       [r4 + 2 * r1],   m5
-lea        r4,              [r4 + 2 * r1]
-movd       [r4 + r1],       m6
-movd       [r4 + 2 * r1],   m7
-
-movh       m1,              [r5 + r3]
-pshufb     m1,              m0
-lea        r4,              [r4 + 2 * r1]
-movd       [r4 + r1],       m1
+movd       [r0],          m0
+pshufd     m0,            m0,         2
+movd       [r0 + r1],     m0
+movd       [r0 + 2 * r1], m2
+lea        r0,            [r0 + 2 * r1]
+pshufd     m2,            m2,         2
+movd       [r0 + r1],     m2
+movd       [r0 + 2 * r1], m4
+lea        r0,            [r0 + 2 * r1]
+pshufd     m4,            m4,         2
+movd       [r0 + r1],     m4
+movd       [r0 + 2 * r1], m6
+lea        r0,            [r0 + 2 * r1]
+pshufd     m6,            m6,         2
+movd       [r0 + r1],     m6
 
 RET
 


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