[x265] [PATCH] blockcopy_sp_8x8, optimized asm code
praveen at multicorewareinc.com
praveen at multicorewareinc.com
Fri Nov 8 12:59:05 CET 2013
# HG changeset patch
# User Praveen Tiwari
# Date 1383911937 -19800
# Node ID d9fd009d7118c9cb76b84e94e01732b10d7bf313
# Parent de021d66138911513648828b3a657c3cba3e9dba
blockcopy_sp_8x8, optimized asm code
diff -r de021d661389 -r d9fd009d7118 source/common/x86/blockcopy8.asm
--- a/source/common/x86/blockcopy8.asm Fri Nov 08 17:20:44 2013 +0530
+++ b/source/common/x86/blockcopy8.asm Fri Nov 08 17:28:57 2013 +0530
@@ -1175,45 +1175,38 @@
; void blockcopy_sp_8x8(pixel *dest, intptr_t destStride, int16_t *src, intptr_t srcStride)
;-----------------------------------------------------------------------------
INIT_XMM sse2
-cglobal blockcopy_sp_8x8, 4, 6, 8, dest, destStride, src, srcStride
+cglobal blockcopy_sp_8x8, 4, 4, 8, dest, destStride, src, srcStride
add r3, r3
-mova m0, [tab_Vm]
+movu m0, [r2]
+movu m1, [r2 + r3]
+movu m2, [r2 + 2 * r3]
+lea r2, [r2 + 2 * r3]
+movu m3, [r2 + r3]
+movu m4, [r2 + 2 * r3]
+lea r2, [r2 + 2 * r3]
+movu m5, [r2 + r3]
+movu m6, [r2 + 2 * r3]
+lea r2, [r2 + 2 * r3]
+movu m7, [r2 + r3]
-movu m1, [r2]
-movu m2, [r2 + r3]
-movu m3, [r2 + 2 * r3]
-lea r4, [r2 + 2 * r3]
-movu m4, [r4 + r3]
-movu m5, [r4 + 2 * r3]
-lea r4, [r4 + 2 * r3]
-movu m6, [r4 + r3]
-movu m7, [r4 + 2 * r3]
-lea r5, [r4 + 2 * r3]
+packuswb m0, m1
+packuswb m2, m3
+packuswb m4, m5
+packuswb m6, m7
-pshufb m1, m0
-pshufb m2, m0
-pshufb m3, m0
-pshufb m4, m0
-pshufb m5, m0
-pshufb m6, m0
-pshufb m7, m0
-
-movh [r0], m1
-movh [r0 + r1], m2
-movh [r0 + 2 * r1], m3
-lea r4, [r0 + 2 * r1]
-movh [r4 + r1], m4
-movh [r4 + 2 * r1], m5
-lea r4, [r4 + 2 * r1]
-movh [r4 + r1], m6
-movh [r4 + 2 * r1], m7
-
-movu m1, [r5 + r3]
-pshufb m1, m0
-lea r4, [r4 + 2 * r1]
-movh [r4 + r1], m1
+movlps [r0], m0
+movhps [r0 + r1], m0
+movlps [r0 + 2 * r1], m2
+lea r0, [r0 + 2 * r1]
+movhps [r0 + r1], m2
+movlps [r0 + 2 * r1], m4
+lea r0, [r0 + 2 * r1]
+movhps [r0 + r1], m4
+movlps [r0 + 2 * r1], m6
+lea r0, [r0 + 2 * r1]
+movhps [r0 + r1], m6
RET
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