[x265] [PATCH] asm code for blockcopy_ps_8x6

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari
# Date 1384160781 -19800
# Node ID da0b44e67fe07caa7ed113ec4946a371d96801be
# Parent  e8756b2c05c7c7de5ec41e9f299b97fc1bc5b28d
asm code for blockcopy_ps_8x6

diff -r e8756b2c05c7 -r da0b44e67fe0 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Mon Nov 11 13:35:11 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp	Mon Nov 11 14:36:21 2013 +0530
@@ -458,6 +458,7 @@
 
         p.chroma_copy_ps[CHROMA_8x2] = x265_blockcopy_ps_8x2_sse4;
         p.chroma_copy_ps[CHROMA_8x4] = x265_blockcopy_ps_8x4_sse4;
+        p.chroma_copy_ps[CHROMA_8x6] = x265_blockcopy_ps_8x6_sse4;
     }
     if (cpuMask & X265_CPU_AVX)
     {
diff -r e8756b2c05c7 -r da0b44e67fe0 source/common/x86/blockcopy8.asm
--- a/source/common/x86/blockcopy8.asm	Mon Nov 11 13:35:11 2013 +0530
+++ b/source/common/x86/blockcopy8.asm	Mon Nov 11 14:36:21 2013 +0530
@@ -1703,3 +1703,43 @@
 movu       [r0 + r1],     m0
 
 RET
+
+;-----------------------------------------------------------------------------
+; void blockcopy_ps_8x6(int16_t *dest, intptr_t destStride, pixel *src, intptr_t srcStride);
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal blockcopy_ps_8x6, 4, 4, 1, dest, destStride, src, srcStride
+
+add        r1,            r1
+
+movh       m0,            [r2]
+pmovzxbw   m0,            m0
+movu       [r0],          m0
+
+movh       m0,            [r2 + r3]
+pmovzxbw   m0,            m0
+movu       [r0 + r1],     m0
+
+movh       m0,            [r2 + 2 * r3]
+pmovzxbw   m0,            m0
+movu       [r0 + 2 * r1], m0
+
+lea        r2,            [r2 + 2 * r3]
+lea        r0,            [r0 + 2 * r1]
+
+movh       m0,            [r2 + r3]
+pmovzxbw   m0,            m0
+movu       [r0 + r1],     m0
+
+movh       m0,            [r2 + 2 * r3]
+pmovzxbw   m0,            m0
+movu       [r0 + 2 * r1], m0
+
+lea        r2,            [r2 + 2 * r3]
+lea        r0,            [r0 + 2 * r1]
+
+movh       m0,            [r2 + r3]
+pmovzxbw   m0,            m0
+movu       [r0 + r1],     m0
+
+RET
diff -r e8756b2c05c7 -r da0b44e67fe0 source/common/x86/blockcopy8.h
--- a/source/common/x86/blockcopy8.h	Mon Nov 11 13:35:11 2013 +0530
+++ b/source/common/x86/blockcopy8.h	Mon Nov 11 14:36:21 2013 +0530
@@ -95,7 +95,8 @@
 
 #define CHROMA_BLOCKCOPY_DEF_SSE4(cpu) \
     SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(8, 2, cpu); \
-    SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(8, 4, cpu);
+    SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(8, 4, cpu); \
+    SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(8, 6, cpu);
 
 CHROMA_BLOCKCOPY_DEF_SSE4(_sse4);