[x265] [PATCH Review only] asm: pixelsub_ps routine for 48x64 block

[murugan at multicorewareinc.com]

# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1384163648 -19800
#      Mon Nov 11 15:24:08 2013 +0530
# Node ID d0f8cfc0dd3157acfdcc5e32871de568a5354e6a
# Parent  c4c017171fb8ef6c30eb93b61fee9e5bdc02ff71
asm: pixelsub_ps routine for 48x64 block

diff -r c4c017171fb8 -r d0f8cfc0dd31 source/common/x86/pixel-a.asm
--- a/source/common/x86/pixel-a.asm	Mon Nov 11 12:32:38 2013 +0530
+++ b/source/common/x86/pixel-a.asm	Mon Nov 11 15:24:08 2013 +0530
@@ -5943,3 +5943,107 @@
 PIXELSUB_PS_W32_H2 32, 24
 PIXELSUB_PS_W32_H2 32, 32
 PIXELSUB_PS_W32_H2 32, 64
+
+;-----------------------------------------------------------------------------
+; void pixel_sub_ps_c_%1x%2(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
+;-----------------------------------------------------------------------------
+%macro PIXELSUB_PS_W48_H2 2
+INIT_XMM sse4
+cglobal pixel_sub_ps_%1x%2, 6, 7, 7, dest, deststride, src0, src1, srcstride0, srcstride1
+
+add    r1,     r1
+mov    r6d,    %2/2
+pxor   m6,    m6
+
+.loop
+
+    movu         m1,    [r2]
+    pmovzxbw     m0,    m1
+    punpckhbw    m1,    m6
+    movu         m3,    [r3]
+    pmovzxbw     m2,    m3
+    punpckhbw    m3,    m6
+    movu         m5,    [r2 + 16]
+    pmovzxbw     m4,    m5
+    punpckhbw    m5,    m6
+
+    psubw        m0,    m2
+    psubw        m1,    m3
+
+    movu    [r0],         m0
+    movu    [r0 + 16],    m1
+
+    movu         m3,    [r3 + 16]
+    pmovzxbw     m2,    m3
+    punpckhbw    m3,    m6
+
+    psubw        m4,    m2
+    psubw        m5,    m3
+
+    movu    [r0 + 32],    m4
+    movu    [r0 + 48],    m5
+
+    movu         m1,    [r2 + 32]
+    pmovzxbw     m0,    m1
+    punpckhbw    m1,    m6
+    movu         m3,    [r3 + 32]
+    pmovzxbw     m2,    m3
+    punpckhbw    m3,    m6
+
+    psubw        m0,    m2
+    psubw        m1,    m3
+
+    movu    [r0 + 64],    m0
+    movu    [r0 + 80],    m1
+
+    movu         m1,    [r2 + r4]
+    pmovzxbw     m0,    m1
+    punpckhbw    m1,    m6
+    movu         m3,    [r3 + r5]
+    pmovzxbw     m2,    m3
+    punpckhbw    m3,    m6
+    movu         m5,    [r2 + r5 + 16]
+    pmovzxbw     m4,    m5
+    punpckhbw    m5,    m6
+
+    psubw        m0,    m2
+    psubw        m1,    m3
+
+    movu    [r0 + r1],         m0
+    movu    [r0 + r1 + 16],    m1
+
+    movu         m3,    [r3 + r4 + 16]
+    pmovzxbw     m2,    m3
+    punpckhbw    m3,    m6
+
+    psubw        m4,    m2
+    psubw        m5,    m3
+
+    movu    [r0 + r1 + 32],    m4
+    movu    [r0 + r1 + 48],    m5
+
+    movu         m1,    [r2 + r4 + 32]
+    pmovzxbw     m0,    m1
+    punpckhbw    m1,    m6
+    movu         m3,    [r3 + r5 + 32]
+    pmovzxbw     m2,    m3
+    punpckhbw    m3,    m6
+
+    psubw        m0,    m2
+    psubw        m1,    m3
+
+    movu    [r0 + r1 + 64],    m0
+    movu    [r0 + r1 + 80],    m1
+
+    lea    r2,    [r2 + 2 * r4]
+    lea    r3,    [r3 + 2 * r5]
+    lea    r0,    [r0 + 2 * r1]
+
+    dec    r6d
+
+jnz    .loop
+
+RET
+%endmacro
+
+PIXELSUB_PS_W48_H2 48, 64