[x265] [PATCH] asm code for blockcopy_ps_2x4

praveen at multicorewareinc.com praveen at multicorewareinc.com
Mon Nov 11 14:26:17 CET 2013


# HG changeset patch
# User Praveen Tiwari
# Date 1384176366 -19800
# Node ID dae4b98dc07ca6ab00c647c556e6be166b3d6d26
# Parent  7a84c2d52c20fb0d915556a008240130c4bf7005
asm code for blockcopy_ps_2x4

diff -r 7a84c2d52c20 -r dae4b98dc07c source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Mon Nov 11 18:23:10 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp	Mon Nov 11 18:56:06 2013 +0530
@@ -455,6 +455,7 @@
         // until all partitions are coded and commit smaller patches, easier to
         // review.
 
+        p.chroma_copy_ps[CHROMA_2x4] = x265_blockcopy_ps_2x4_sse4;
         p.chroma_copy_ps[CHROMA_4x2] = x265_blockcopy_ps_4x2_sse4;
         p.chroma_copy_ps[CHROMA_4x4] = x265_blockcopy_ps_4x4_sse4;
         p.chroma_copy_ps[CHROMA_4x8] = x265_blockcopy_ps_4x8_sse4;
diff -r 7a84c2d52c20 -r dae4b98dc07c source/common/x86/blockcopy8.asm
--- a/source/common/x86/blockcopy8.asm	Mon Nov 11 18:23:10 2013 +0530
+++ b/source/common/x86/blockcopy8.asm	Mon Nov 11 18:56:06 2013 +0530
@@ -1658,6 +1658,36 @@
 BLOCKFILL_S_W32_H4 32, 32
 
 
+
+;-----------------------------------------------------------------------------
+; void blockcopy_ps_2x4(int16_t *dest, intptr_t destStride, pixel *src, intptr_t srcStride);
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal blockcopy_ps_2x4, 4, 4, 1, dest, destStride, src, srcStride
+
+add        r1,            r1
+
+movd       m0,            [r2]
+pmovzxbw   m0,            m0
+pextrd     [r0],          m0,           0
+
+movd       m0,            [r2 + r3]
+pmovzxbw   m0,            m0
+pextrd     [r0 + r1],     m0,           0
+
+movd       m0,            [r2 + 2 * r3]
+pmovzxbw   m0,            m0
+pextrd     [r0 + 2 * r1], m0,           0
+
+lea        r2,            [r2 + 2 * r3]
+lea        r0,            [r0 + 2 * r1]
+
+movd       m0,            [r2 + r3]
+pmovzxbw   m0,            m0
+pextrd     [r0 + r1],     m0,           0
+
+RET
+
 ;-----------------------------------------------------------------------------
 ; void blockcopy_ps_4x2(int16_t *dest, intptr_t destStride, pixel *src, intptr_t srcStride);
 ;-----------------------------------------------------------------------------
diff -r 7a84c2d52c20 -r dae4b98dc07c source/common/x86/blockcopy8.h
--- a/source/common/x86/blockcopy8.h	Mon Nov 11 18:23:10 2013 +0530
+++ b/source/common/x86/blockcopy8.h	Mon Nov 11 18:56:06 2013 +0530
@@ -94,6 +94,7 @@
     void x265_blockcopy_ps_ ## W ## x ## H ## cpu(int16_t *dst, intptr_t dstStride, pixel *src, intptr_t srcStride);
 
 #define CHROMA_BLOCKCOPY_DEF_SSE4(cpu) \
+    SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(2, 4, cpu); \
     SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(4, 2, cpu); \
     SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(4, 4, cpu); \
     SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(4, 8, cpu); \


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