[x265] [PATCH] asm code for blockcopy_ps_2x8

praveen at multicorewareinc.com praveen at multicorewareinc.com
Mon Nov 11 14:50:55 CET 2013


# HG changeset patch
# User Praveen Tiwari
# Date 1384177841 -19800
# Node ID 184059c875b5f68a68c3fd0a9935fed88cba5e7a
# Parent  517f44c8030b98fedd53db7eded615d85d84a451
asm code for blockcopy_ps_2x8

diff -r 517f44c8030b -r 184059c875b5 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Mon Nov 11 19:10:18 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp	Mon Nov 11 19:20:41 2013 +0530
@@ -456,6 +456,7 @@
         // review.
 
         p.chroma_copy_ps[CHROMA_2x4] = x265_blockcopy_ps_2x4_sse4;
+        p.chroma_copy_ps[CHROMA_2x8] = x265_blockcopy_ps_2x8_sse4;
         p.chroma_copy_ps[CHROMA_4x2] = x265_blockcopy_ps_4x2_sse4;
         p.chroma_copy_ps[CHROMA_4x4] = x265_blockcopy_ps_4x4_sse4;
         p.chroma_copy_ps[CHROMA_4x8] = x265_blockcopy_ps_4x8_sse4;
diff -r 517f44c8030b -r 184059c875b5 source/common/x86/blockcopy8.asm
--- a/source/common/x86/blockcopy8.asm	Mon Nov 11 19:10:18 2013 +0530
+++ b/source/common/x86/blockcopy8.asm	Mon Nov 11 19:20:41 2013 +0530
@@ -1688,6 +1688,58 @@
 
 RET
 
+
+;-----------------------------------------------------------------------------
+; void blockcopy_ps_2x8(int16_t *dest, intptr_t destStride, pixel *src, intptr_t srcStride);
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal blockcopy_ps_2x8, 4, 4, 1, dest, destStride, src, srcStride
+
+add        r1,            r1
+
+movd       m0,            [r2]
+pmovzxbw   m0,            m0
+movd       [r0],          m0
+
+movd       m0,            [r2 + r3]
+pmovzxbw   m0,            m0
+movd       [r0 + r1],     m0
+
+movd       m0,            [r2 + 2 * r3]
+pmovzxbw   m0,            m0
+movd       [r0 + 2 * r1], m0
+
+lea        r2,            [r2 + 2 * r3]
+lea        r0,            [r0 + 2 * r1]
+
+movd       m0,            [r2 + r3]
+pmovzxbw   m0,            m0
+movd       [r0 + r1],     m0
+
+movd       m0,            [r2 + 2 * r3]
+pmovzxbw   m0,            m0
+movd       [r0 + 2 * r1], m0
+
+lea        r2,            [r2 + 2 * r3]
+lea        r0,            [r0 + 2 * r1]
+
+movd       m0,            [r2 + r3]
+pmovzxbw   m0,            m0
+movd       [r0 + r1],     m0
+
+movd       m0,            [r2 + 2 * r3]
+pmovzxbw   m0,            m0
+movd       [r0 + 2 * r1], m0
+
+lea        r2,            [r2 + 2 * r3]
+lea        r0,            [r0 + 2 * r1]
+
+movd       m0,            [r2 + r3]
+pmovzxbw   m0,            m0
+movd       [r0 + r1],     m0
+
+RET
+
 ;-----------------------------------------------------------------------------
 ; void blockcopy_ps_4x2(int16_t *dest, intptr_t destStride, pixel *src, intptr_t srcStride);
 ;-----------------------------------------------------------------------------
diff -r 517f44c8030b -r 184059c875b5 source/common/x86/blockcopy8.h
--- a/source/common/x86/blockcopy8.h	Mon Nov 11 19:10:18 2013 +0530
+++ b/source/common/x86/blockcopy8.h	Mon Nov 11 19:20:41 2013 +0530
@@ -95,6 +95,7 @@
 
 #define CHROMA_BLOCKCOPY_DEF_SSE4(cpu) \
     SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(2, 4, cpu); \
+    SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(2, 8, cpu); \
     SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(4, 2, cpu); \
     SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(4, 4, cpu); \
     SETUP_CHROMA_BLOCKCOPY_FUNC_SSE4(4, 8, cpu); \


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