[x265] [PATCH Review only] asm: pixelsub_ps routine for 6x8 block

[murugan at multicorewareinc.com]

# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1384180435 -19800
#      Mon Nov 11 20:03:55 2013 +0530
# Node ID 4a38d3f3c3634e64d83e4457cc735aa2e3b9698a
# Parent  fa2a0c6166d816d6d5a698e1386bbf412ed5f722
asm: pixelsub_ps routine for 6x8 block

diff -r fa2a0c6166d8 -r 4a38d3f3c363 source/common/x86/pixel-a.asm
--- a/source/common/x86/pixel-a.asm	Mon Nov 11 18:40:56 2013 +0530
+++ b/source/common/x86/pixel-a.asm	Mon Nov 11 20:03:55 2013 +0530
@@ -5527,6 +5527,72 @@
 PIXELSUB_PS_W4_H4 4, 16
 
 ;-----------------------------------------------------------------------------
+; void pixel_sub_ps_c_%1x%2(int16_t *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
+;-----------------------------------------------------------------------------
+%macro PIXELSUB_PS_W6_H4 2
+INIT_XMM sse4
+cglobal pixel_sub_ps_%1x%2, 6, 7, 8, dest, deststride, src0, src1, srcstride0, srcstride1
+
+add    r1,     r1
+mov    r6d,    %2/4
+
+.loop
+
+    movh         m0,     [r2]
+    movh         m1,     [r3]
+
+    movh         m2,     [r2 + r4]
+    movh         m3,     [r3 + r5]
+
+    movh         m4,     [r2 + 2 * r4]
+    movh         m5,     [r3 + 2 * r5]
+
+    lea          r2,     [r2 + 2 * r4]
+    lea          r3,     [r3 + 2 * r5]
+
+    movh         m6,     [r2 + r4]
+    movh         m7,     [r3 + r5]
+
+    pmovzxbw    m0,    m0
+    pmovzxbw    m1,    m1
+    pmovzxbw    m2,    m2
+    pmovzxbw    m3,    m3
+    pmovzxbw    m4,    m4
+    pmovzxbw    m5,    m5
+    pmovzxbw    m6,    m6
+    pmovzxbw    m7,    m7
+
+    psubw       m0,    m1
+    psubw       m2,    m3
+    psubw       m4,    m5
+    psubw       m6,    m7
+
+    movlps    [r0],                 m0
+    pextrd    [r0 + 8],             m0,    2
+    movlps    [r0 + r1],            m2
+    pextrd    [r0 + r1 + 8],        m2,    2
+    movlps    [r0 + 2* r1],         m4
+    pextrd    [r0 + 2 * r1 + 8],    m4,    2
+
+    lea       r0,                   [r0 + 2 * r1]
+
+    movlps    [r0 + r1],            m6
+    pextrd    [r0 + r1 + 8],        m6,    2
+
+    lea     r2,              [r2 + 2 * r4]
+    lea     r3,              [r3 + 2 * r5]
+    lea     r0,              [r0 + 2 * r1]
+
+    dec     r6d
+
+jnz    .loop
+
+RET
+%endmacro
+
+PIXELSUB_PS_W6_H4 6, 8
+
+;-----------------------------------------------------------------------------
 ; void pixel_sub_ps_c_8x2(int16_t *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
 ;-----------------------------------------------------------------------------
 INIT_XMM sse4