[x265] [PATCH] asm: pixelsub_ps routine for all block sizes
chen
chenm003 at 163.com
Tue Nov 12 03:57:32 CET 2013
>+movd m0, [r2]
>+pinsrw m0, [r2 + r4], 2
>+movd m1, [r2 + 2 * r4]
pinsrw is expensive instruction, it generate 2 uops
at here, the width is 2, so I suggest use general register future (movzx+sub)
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