[x265] [PATCH] pixel_add_ps_8x6, asm code
praveen at multicorewareinc.com
praveen at multicorewareinc.com
Wed Nov 20 15:05:19 CET 2013
# HG changeset patch
# User Praveen Tiwari
# Date 1384956308 -19800
# Node ID bece58e29da2e749c76a320b9985b5fad3ffec5e
# Parent 44dae88dacf16829fc17942e9f8812ad79dd2813
pixel_add_ps_8x6, asm code
diff -r 44dae88dacf1 -r bece58e29da2 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Wed Nov 20 19:28:06 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp Wed Nov 20 19:35:08 2013 +0530
@@ -645,6 +645,7 @@
p.chroma_add_ps[X265_CSP_I420][CHROMA_4x16] = x265_pixel_add_ps_4x16_sse4;
p.chroma_add_ps[X265_CSP_I420][CHROMA_8x2] = x265_pixel_add_ps_8x2_sse4;
p.chroma_add_ps[X265_CSP_I420][CHROMA_8x4] = x265_pixel_add_ps_8x4_sse4;
+ p.chroma_add_ps[X265_CSP_I420][CHROMA_8x6] = x265_pixel_add_ps_8x6_sse4;
}
if (cpuMask & X265_CPU_AVX)
{
diff -r 44dae88dacf1 -r bece58e29da2 source/common/x86/pixeladd8.asm
--- a/source/common/x86/pixeladd8.asm Wed Nov 20 19:28:06 2013 +0530
+++ b/source/common/x86/pixeladd8.asm Wed Nov 20 19:35:08 2013 +0530
@@ -233,3 +233,69 @@
movh [r0 + r1], m0
RET
+
+;-----------------------------------------------------------------------------
+; void pixel_add_ps_8x6(pixel *dest, intptr_t destride, pixel *src0, int16_t *scr1, intptr_t srcStride0, intptr_t srcStride1)
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal pixel_add_ps_8x6, 6, 6, 2, dest, destride, src0, scr1, srcStride0, srcStride1
+
+add r5, r5
+
+pmovzxbw m0, [r2]
+movu m1, [r3]
+
+paddw m0, m1
+packuswb m0, m0
+
+movh [r0], m0
+
+pmovzxbw m0, [r2 + r4]
+movu m1, [r3 + r5]
+
+paddw m0, m1
+packuswb m0, m0
+
+movh [r0 + r1], m0
+
+pmovzxbw m0, [r2 + 2 * r4]
+movu m1, [r3 + 2 * r5]
+
+paddw m0, m1
+packuswb m0, m0
+
+movh [r0 + 2 * r1], m0
+
+lea r0, [r0 + 2 * r1]
+lea r2, [r2 + 2 * r4]
+lea r3, [r3 + 2 * r5]
+
+pmovzxbw m0, [r2 + r4]
+movu m1, [r3 + r5]
+
+paddw m0, m1
+packuswb m0, m0
+
+movh [r0 + r1], m0
+
+pmovzxbw m0, [r2 + 2 * r4]
+movu m1, [r3 + 2 * r5]
+
+paddw m0, m1
+packuswb m0, m0
+
+movh [r0 + 2 * r1], m0
+
+lea r0, [r0 + 2 * r1]
+lea r2, [r2 + 2 * r4]
+lea r3, [r3 + 2 * r5]
+
+pmovzxbw m0, [r2 + r4]
+movu m1, [r3 + r5]
+
+paddw m0, m1
+packuswb m0, m0
+
+movh [r0 + r1], m0
+
+RET
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