[x265] [PATCH] pixel_add_ps_16x4, asm code

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari
# Date 1385021399 -19800
# Node ID fe475a8af3408576f07ece8dab7b7814bc393b50
# Parent  db1151bb4974f1288745ba39dfd6e1838113feb7
pixel_add_ps_16x4, asm code

diff -r db1151bb4974 -r fe475a8af340 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Wed Nov 20 18:36:04 2013 -0600
+++ b/source/common/x86/asm-primitives.cpp	Thu Nov 21 13:39:59 2013 +0530
@@ -645,6 +645,7 @@
         p.chroma[X265_CSP_I420].add_ps[CHROMA_8x8] = x265_pixel_add_ps_8x8_sse4;
         p.chroma[X265_CSP_I420].add_ps[CHROMA_8x16] = x265_pixel_add_ps_8x16_sse4;
         p.chroma[X265_CSP_I420].add_ps[CHROMA_8x32] = x265_pixel_add_ps_8x32_sse4;
+        p.chroma[X265_CSP_I420].add_ps[CHROMA_16x4] = x265_pixel_add_ps_16x4_sse4;
 
         p.chroma[X265_CSP_I420].filter_vsp[CHROMA_2x4] = x265_interp_4tap_vert_sp_2x4_sse4;
         p.chroma[X265_CSP_I420].filter_vsp[CHROMA_2x8] = x265_interp_4tap_vert_sp_2x8_sse4;
diff -r db1151bb4974 -r fe475a8af340 source/common/x86/pixeladd8.asm
--- a/source/common/x86/pixeladd8.asm	Wed Nov 20 18:36:04 2013 -0600
+++ b/source/common/x86/pixeladd8.asm	Thu Nov 21 13:39:59 2013 +0530
@@ -361,3 +361,69 @@
 PIXEL_ADD_PS_W8_H4 8,  8
 PIXEL_ADD_PS_W8_H4 8, 16
 PIXEL_ADD_PS_W8_H4 8, 32
+
+;-----------------------------------------------------------------------------
+; void pixel_add_ps_16x4(pixel *dest, intptr_t destride, pixel *src0, int16_t *scr1, intptr_t srcStride0, intptr_t srcStride1)
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal pixel_add_ps_16x4, 6, 6, 4, dest, destride, src0, scr1, srcStride0, srcStride1
+
+add         r5,            r5
+
+pmovzxbw    m0,            [r2]
+pmovzxbw    m1,            [r2 + 8]
+
+movu        m2,            [r3]
+movu        m3,            [r3 + 16]
+
+paddw       m0,            m2
+paddw       m1,            m3
+
+packuswb    m0,            m1
+
+movu        [r0],          m0
+
+pmovzxbw    m0,            [r2 + r4]
+pmovzxbw    m1,            [r2 + r4 + 8]
+
+movu        m2,            [r3 + r5]
+movu        m3,            [r3 + r5 + 16]
+
+paddw       m0,            m2
+paddw       m1,            m3
+
+packuswb    m0,            m1
+
+movu        [r0 + r1],     m0
+
+pmovzxbw    m0,            [r2 + 2 * r4]
+pmovzxbw    m1,            [r2 + 2 * r4 + 8]
+
+movu        m2,            [r3 + 2 * r5]
+movu        m3,            [r3 + 2 * r5 + 16]
+
+paddw       m0,            m2
+paddw       m1,            m3
+
+packuswb    m0,            m1
+
+movu        [r0 + 2 * r1], m0
+
+lea         r0,            [r0 + 2 * r1]
+lea         r2,            [r2 + 2 * r4]
+lea         r3,            [r3 + 2 * r5]
+
+pmovzxbw    m0,            [r2 + r4]
+pmovzxbw    m1,            [r2 + r4 + 8]
+
+movu        m2,            [r3 + r5]
+movu        m3,            [r3 + r5 + 16]
+
+paddw       m0,            m2
+paddw       m1,            m3
+
+packuswb    m0,            m1
+
+movu        [r0 + r1],     m0
+
+RET