[x265] [PATCH] pixel_add_ps,32xN asm code

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari
# Date 1385026478 -19800
# Node ID 5631b76420c022ae2933e313d102d49bf23c0bcf
# Parent  d5f74ae703f406c339ffe0e31683e75d6cfadd57
pixel_add_ps,32xN asm code

diff -r d5f74ae703f4 -r 5631b76420c0 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Thu Nov 21 14:36:22 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp	Thu Nov 21 15:04:38 2013 +0530
@@ -650,6 +650,10 @@
         p.chroma[X265_CSP_I420].add_ps[CHROMA_16x12] = x265_pixel_add_ps_16x12_sse4;
         p.chroma[X265_CSP_I420].add_ps[CHROMA_16x16] = x265_pixel_add_ps_16x16_sse4;
         p.chroma[X265_CSP_I420].add_ps[CHROMA_16x32] = x265_pixel_add_ps_16x32_sse4;
+        p.chroma[X265_CSP_I420].add_ps[CHROMA_32x8] = x265_pixel_add_ps_32x8_sse4;
+        p.chroma[X265_CSP_I420].add_ps[CHROMA_32x16] = x265_pixel_add_ps_32x16_sse4;
+        p.chroma[X265_CSP_I420].add_ps[CHROMA_32x24] = x265_pixel_add_ps_32x24_sse4;
+        p.chroma[X265_CSP_I420].add_ps[CHROMA_32x32] = x265_pixel_add_ps_32x32_sse4;
 
         p.chroma[X265_CSP_I420].filter_vsp[CHROMA_2x4] = x265_interp_4tap_vert_sp_2x4_sse4;
         p.chroma[X265_CSP_I420].filter_vsp[CHROMA_2x8] = x265_interp_4tap_vert_sp_2x8_sse4;
diff -r d5f74ae703f4 -r 5631b76420c0 source/common/x86/pixeladd8.asm
--- a/source/common/x86/pixeladd8.asm	Thu Nov 21 14:36:22 2013 +0530
+++ b/source/common/x86/pixeladd8.asm	Thu Nov 21 15:04:38 2013 +0530
@@ -509,3 +509,72 @@
 PIXEL_ADD_PS_W16_H4 16, 12
 PIXEL_ADD_PS_W16_H4 16, 16
 PIXEL_ADD_PS_W16_H4 16, 32
+
+;-----------------------------------------------------------------------------
+; void pixel_add_ps_%1x%2(pixel *dest, intptr_t destride, pixel *src0, int16_t *scr1, intptr_t srcStride0, intptr_t srcStride1)
+;-----------------------------------------------------------------------------
+%macro PIXEL_ADD_PS_W32_H2 2
+INIT_XMM sse4
+cglobal pixel_add_ps_%1x%2, 6, 7, 4, dest, destride, src0, scr1, srcStride0, srcStride1
+
+add         r5,            r5
+
+mov         r6d,           %2/2
+
+.loop
+      pmovzxbw    m0,             [r2]
+      pmovzxbw    m1,             [r2 + 8]
+      pmovzxbw    m2,             [r2 + 16]
+      pmovzxbw    m3,             [r2 + 24]
+
+      movu        m4,             [r3]
+      movu        m5,             [r3 + 16]
+      movu        m6,             [r3 + 32]
+      movu        m7,             [r3 + 48]
+
+      paddw       m0,             m4
+      paddw       m1,             m5
+      paddw       m2,             m6
+      paddw       m3,             m7
+
+      packuswb    m0,             m1
+      packuswb    m2,             m3
+
+      movu        [r0],           m0
+      movu        [r0 + 16],      m2
+
+      pmovzxbw    m0,             [r2 + r4]
+      pmovzxbw    m1,             [r2 + r4 + 8]
+      pmovzxbw    m2,             [r2 + r4 + 16]
+      pmovzxbw    m3,             [r2 + r4 + 24]
+
+      movu        m4,             [r3 + r5]
+      movu        m5,             [r3 + r5 + 16]
+      movu        m6,             [r3 + r5 + 32]
+      movu        m7,             [r3 + r5 + 48]
+
+      paddw       m0,             m4
+      paddw       m1,             m5
+      paddw       m2,             m6
+      paddw       m3,             m7
+
+      packuswb    m0,             m1
+      packuswb    m2,             m3
+
+      movu        [r0 + r1],      m0
+      movu        [r0 + r1 + 16], m2
+
+      lea         r0,             [r0 + 2 * r1]
+      lea         r2,             [r2 + 2 * r4]
+      lea         r3,             [r3 + 2 * r5]
+
+      dec         r6d
+      jnz         .loop
+
+RET
+%endmacro
+
+PIXEL_ADD_PS_W32_H2 32,  8
+PIXEL_ADD_PS_W32_H2 32, 16
+PIXEL_ADD_PS_W32_H2 32, 24
+PIXEL_ADD_PS_W32_H2 32, 32