[x265] [PATCH] asm: code for sse_pp_12x16 routine

[murugan at multicorewareinc.com]

# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1385106633 -19800
#      Fri Nov 22 13:20:33 2013 +0530
# Node ID 7a576d46cc9067c937677d013d70f5ed9639107b
# Parent  5009254d3d3ac92e90b1551444c5eb32ba2f8d31
asm: code for sse_pp_12x16 routine

diff -r 5009254d3d3a -r 7a576d46cc90 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Fri Nov 22 00:17:46 2013 -0600
+++ b/source/common/x86/asm-primitives.cpp	Fri Nov 22 13:20:33 2013 +0530
@@ -603,6 +603,8 @@
         p.sa8d[BLOCK_16x16] = x265_pixel_sa8d_16x16_sse4;
         SA8D_INTER_FROM_BLOCK(sse4);
 
+        p.sse_pp[LUMA_12x16] = x265_pixel_ssd_12x16_sse4;
+
         CHROMA_PIXELSUB_PS(_sse4);
 
         CHROMA_FILTERS(_sse4);
diff -r 5009254d3d3a -r 7a576d46cc90 source/common/x86/pixel-a.asm
--- a/source/common/x86/pixel-a.asm	Fri Nov 22 00:17:46 2013 -0600
+++ b/source/common/x86/pixel-a.asm	Fri Nov 22 13:20:33 2013 +0530
@@ -537,6 +537,82 @@
 %endif ; !HIGH_BIT_DEPTH
 
 ;-----------------------------------------------------------------------------
+; int pixel_ssd_12x16( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal pixel_ssd_12x16, 4, 5, 7, src1, stride1, src2, stride2
+
+    pxor        m6,     m6
+    mov         r4d,    4
+
+.loop
+    movu        m0,    [r0]
+    movu        m1,    [r2]
+    movu        m2,    [r0 + r1]
+    movu        m3,    [r2 + r3]
+
+    punpckhdq   m4,    m0,    m2
+    punpckhdq   m5,    m1,    m3
+
+    pmovzxbw    m0,    m0
+    pmovzxbw    m1,    m1
+    pmovzxbw    m2,    m2
+    pmovzxbw    m3,    m3
+    pmovzxbw    m4,    m4
+    pmovzxbw    m5,    m5
+
+    psubw       m0,    m1
+    psubw       m2,    m3
+    psubw       m4,    m5
+
+    pmaddwd     m0,    m0
+    pmaddwd     m2,    m2
+    pmaddwd     m4,    m4
+
+    paddd       m0,    m2
+    paddd       m6,    m4
+    paddd       m6,    m0
+
+    movu        m0,    [r0 + 2 * r1]
+    movu        m1,    [r2 + 2 * r3]
+    lea         r0,    [r0 + 2 * r1]
+    lea         r2,    [r2 + 2 * r3]
+    movu        m2,    [r0 + r1]
+    movu        m3,    [r2 + r3]
+
+    punpckhdq   m4,    m0,    m2
+    punpckhdq   m5,    m1,    m3
+
+    pmovzxbw    m0,    m0
+    pmovzxbw    m1,    m1
+    pmovzxbw    m2,    m2
+    pmovzxbw    m3,    m3
+    pmovzxbw    m4,    m4
+    pmovzxbw    m5,    m5
+
+    psubw       m0,    m1
+    psubw       m2,    m3
+    psubw       m4,    m5
+
+    pmaddwd     m0,    m0
+    pmaddwd     m2,    m2
+    pmaddwd     m4,    m4
+
+    paddd       m0,    m2
+    paddd       m6,    m4
+    paddd       m6,    m0
+
+    dec    r4d
+    lea       r0,                    [r0 + 2 * r1]
+    lea       r2,                    [r2 + 2 * r3]
+    jnz    .loop
+
+    HADDD   m6, m1
+    movd   eax, m6
+
+    RET
+
+;-----------------------------------------------------------------------------
 ; void pixel_ssd_nv12_core( uint16_t *pixuv1, intptr_t stride1, uint16_t *pixuv2, intptr_t stride2,
 ;                           int width, int height, uint64_t *ssd_u, uint64_t *ssd_v )
 ;
diff -r 5009254d3d3a -r 7a576d46cc90 source/common/x86/pixel.h
--- a/source/common/x86/pixel.h	Fri Nov 22 00:17:46 2013 -0600
+++ b/source/common/x86/pixel.h	Fri Nov 22 13:20:33 2013 +0530
@@ -372,5 +372,6 @@
 uint32_t x265_quant_sse4(int32_t *coef, int32_t *quantCoeff, int32_t *deltaU, int32_t *qCoef, int qBits, int add, int numCoeff, int32_t* lastPos);
 void x265_transpose32_sse2(pixel *dest, pixel *src, intptr_t stride);
 void x265_transpose64_sse2(pixel *dest, pixel *src, intptr_t stride);
+int x265_pixel_ssd_12x16_sse4(pixel *, intptr_t, pixel *, intptr_t);
 
 #endif // ifndef X265_I386_PIXEL_H