[x265] [PATCH] asm: code for pixel_sse_sp_32xN
murugan at multicorewareinc.com
murugan at multicorewareinc.com
Wed Nov 27 11:29:42 CET 2013
# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1385548163 -19800
# Wed Nov 27 15:59:23 2013 +0530
# Branch stable
# Node ID b4e6a04b9d2dc6386013bfc3cfd6b89569e6ad65
# Parent d770e8e65dc41c224cdea78efd588c5b2155c606
asm: code for pixel_sse_sp_32xN
diff -r d770e8e65dc4 -r b4e6a04b9d2d source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Wed Nov 27 15:19:13 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp Wed Nov 27 15:59:23 2013 +0530
@@ -647,6 +647,11 @@
p.sse_sp[LUMA_16x16] = x265_pixel_ssd_sp_16x16_sse4;
p.sse_sp[LUMA_16x32] = x265_pixel_ssd_sp_16x32_sse4;
p.sse_sp[LUMA_16x64] = x265_pixel_ssd_sp_16x64_sse4;
+ p.sse_sp[LUMA_32x8] = x265_pixel_ssd_sp_32x8_sse4;
+ p.sse_sp[LUMA_32x16] = x265_pixel_ssd_sp_32x16_sse4;
+ p.sse_sp[LUMA_32x24] = x265_pixel_ssd_sp_32x24_sse4;
+ p.sse_sp[LUMA_32x32] = x265_pixel_ssd_sp_32x32_sse4;
+ p.sse_sp[LUMA_32x64] = x265_pixel_ssd_sp_32x64_sse4;
CHROMA_PIXELSUB_PS(_sse4);
diff -r d770e8e65dc4 -r b4e6a04b9d2d source/common/x86/pixel-a.asm
--- a/source/common/x86/pixel-a.asm Wed Nov 27 15:19:13 2013 +0530
+++ b/source/common/x86/pixel-a.asm Wed Nov 27 15:59:23 2013 +0530
@@ -1413,6 +1413,148 @@
RET
;-----------------------------------------------------------------------------
+; int pixel_ssd_32x8( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal pixel_ssd_sp_32x8, 4, 7, 8, src1, stride1, src2, stride2
+
+ pxor m7, m7
+ pxor m6, m6
+ mov r5, r0
+ mov r6, r2
+ add r1, r1
+ lea r4, [r1 * 2]
+ PIXEL_SSD_SP_16x4
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ PIXEL_SSD_SP_16x4
+ lea r0, [r5 + 32]
+ lea r2, [r6 + 16]
+ PIXEL_SSD_SP_16x4
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ PIXEL_SSD_SP_16x4
+ HADDD m7, m1
+ movd eax, m7
+ RET
+
+;-----------------------------------------------------------------------------
+; int pixel_ssd_32x16( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal pixel_ssd_sp_32x16, 4, 7, 8, src1, stride1, src2, stride2
+
+ pxor m7, m7
+ pxor m6, m6
+ mov r5, r0
+ mov r6, r2
+ add r1, r1
+ lea r4, [r1 * 2]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r5 + 32]
+ lea r2, [r6 + 16]
+ call pixel_ssd_sp_16x16_internal
+ HADDD m7, m1
+ movd eax, m7
+ RET
+
+;-----------------------------------------------------------------------------
+; int pixel_ssd_32x24( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal pixel_ssd_sp_32x24, 4, 7, 8, src1, stride1, src2, stride2
+
+ pxor m7, m7
+ pxor m6, m6
+ mov r5, r0
+ mov r6, r2
+ add r1, r1
+ lea r4, [r1 * 2]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ PIXEL_SSD_SP_16x4
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ PIXEL_SSD_SP_16x4
+ lea r0, [r5 + 32]
+ lea r2, [r6 + 16]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ PIXEL_SSD_SP_16x4
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ PIXEL_SSD_SP_16x4
+ HADDD m7, m1
+ movd eax, m7
+ RET
+
+;-----------------------------------------------------------------------------
+; int pixel_ssd_32x32( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal pixel_ssd_sp_32x32, 4, 7, 8, src1, stride1, src2, stride2
+
+ pxor m7, m7
+ pxor m6, m6
+ mov r5, r0
+ mov r6, r2
+ add r1, r1
+ lea r4, [r1 * 2]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r5 + 32]
+ lea r2, [r6 + 16]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ call pixel_ssd_sp_16x16_internal
+ HADDD m7, m1
+ movd eax, m7
+ RET
+
+;-----------------------------------------------------------------------------
+; int pixel_ssd_32x64( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal pixel_ssd_sp_32x64, 4, 7, 8, src1, stride1, src2, stride2
+
+ pxor m7, m7
+ pxor m6, m6
+ mov r5, r0
+ mov r6, r2
+ add r1, r1
+ lea r4, [r1 * 2]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r5 + 32]
+ lea r2, [r6 + 16]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ call pixel_ssd_sp_16x16_internal
+ HADDD m7, m1
+ movd eax, m7
+ RET
+
+;-----------------------------------------------------------------------------
; void pixel_ssd_nv12_core( uint16_t *pixuv1, intptr_t stride1, uint16_t *pixuv2, intptr_t stride2,
; int width, int height, uint64_t *ssd_u, uint64_t *ssd_v )
;
diff -r d770e8e65dc4 -r b4e6a04b9d2d source/common/x86/pixel.h
--- a/source/common/x86/pixel.h Wed Nov 27 15:19:13 2013 +0530
+++ b/source/common/x86/pixel.h Wed Nov 27 15:59:23 2013 +0530
@@ -407,4 +407,9 @@
int x265_pixel_ssd_sp_16x16_sse4(int16_t *, intptr_t, pixel *, intptr_t);
int x265_pixel_ssd_sp_16x32_sse4(int16_t *, intptr_t, pixel *, intptr_t);
int x265_pixel_ssd_sp_16x64_sse4(int16_t *, intptr_t, pixel *, intptr_t);
+int x265_pixel_ssd_sp_32x8_sse4(int16_t *, intptr_t, pixel *, intptr_t);
+int x265_pixel_ssd_sp_32x16_sse4(int16_t *, intptr_t, pixel *, intptr_t);
+int x265_pixel_ssd_sp_32x24_sse4(int16_t *, intptr_t, pixel *, intptr_t);
+int x265_pixel_ssd_sp_32x32_sse4(int16_t *, intptr_t, pixel *, intptr_t);
+int x265_pixel_ssd_sp_32x64_sse4(int16_t *, intptr_t, pixel *, intptr_t);
#endif // ifndef X265_I386_PIXEL_H
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