[x265] [PATCH] sse.inc: Replace sse_ss4 vector class function with intrinsic

dnyaneshwar at multicorewareinc.com dnyaneshwar at multicorewareinc.com
Wed Oct 9 12:28:28 CEST 2013


# HG changeset patch
# User Dnyaneshwar Gorade <dnyaneshwar at multicorewareinc.com>
# Date 1381314453 -19800
#      Wed Oct 09 15:57:33 2013 +0530
# Node ID 118741a00fca214989335c483e4ddc8c6826fc0f
# Parent  9250f0f7e2df00ef582d198b17a835583e2452e2
sse.inc: Replace sse_ss4 vector class function with intrinsic.

diff -r 9250f0f7e2df -r 118741a00fca source/common/vec/sse.inc
--- a/source/common/vec/sse.inc	Wed Oct 09 14:14:20 2013 +0530
+++ b/source/common/vec/sse.inc	Wed Oct 09 15:57:33 2013 +0530
@@ -52,22 +52,26 @@
 int sse_ss4(short* fenc, intptr_t strideFenc, short* fref, intptr_t strideFref)
 {
     int rows = ly;
+    __m128i diff;
+    __m128i sum  = _mm_setzero_si128();
+    __m128i m1, n1, sign;
 
-    Vec4i diff(0);
-    Vec8s m1, n1;
-    Vec4i sum(0);
     for (; rows != 0; rows--)
     {
-        m1.load(fenc);
-        n1.load(fref);
-        diff = extend_low(m1) - extend_low(n1);
-        diff = diff * diff;
-        sum += diff;
+        m1   = _mm_loadu_si128((__m128i const*)fenc);
+        n1   = _mm_loadu_si128((__m128i const*)fref);
+        sign = _mm_srai_epi16(m1, 15);                   // sign bit
+        m1   = _mm_unpacklo_epi16(m1, sign);             // interleave with sign extensions
+        sign = _mm_srai_epi16(n1, 15);
+        n1   = _mm_unpacklo_epi16(n1, sign);
+        diff = _mm_sub_epi32(m1, n1);
+        diff = _mm_mullo_epi32(diff, diff);
+        sum  = _mm_add_epi32(sum, diff);
         fenc += strideFenc;
         fref += strideFref;
     }
-
-    return horizontal_add(sum);
+    __m128i sum1  = _mm_hadd_epi32(sum, sum);            // horizontally add 4 elements
+    return _mm_cvtsi128_si32(_mm_hadd_epi32(sum1, sum1));
 }
 
 template<int ly>


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