[x265] [PATCH] asm code for interp_4tap_vert_pp_8x2
praveen at multicorewareinc.com
praveen at multicorewareinc.com
Tue Oct 22 17:23:13 CEST 2013
# HG changeset patch
# User Praveen Tiwari
# Date 1382455384 -19800
# Node ID 93a50baa316f2cf82ef65e0ea639a8b36ac160fa
# Parent 9245a882ccee89fc1d158b501587bac7d6e081e4
asm code for interp_4tap_vert_pp_8x2
diff -r 9245a882ccee -r 93a50baa316f source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Mon Oct 21 22:45:55 2013 -0500
+++ b/source/common/x86/ipfilter8.asm Tue Oct 22 20:53:04 2013 +0530
@@ -35,6 +35,9 @@
db 4, 5, 6, 7, 8, 9, 10, 11, 5, 6, 7, 8, 9, 10, 11, 12
db 6, 7, 8, 9, 10, 11, 12, 13, 7, 8, 9, 10, 11, 12, 13, 14
+tab_Vm: db 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1
+ db 2, 3, 2, 3, 2, 3, 2, 3, 2, 3, 2, 3, 2, 3, 2, 3
+
tab_c_512: times 8 dw 512
tab_ChromaCoeff: db 0, 64, 0, 0
@@ -621,3 +624,62 @@
IPFILTER_LUMA 48, 64
IPFILTER_LUMA 64, 16
IPFILTER_LUMA 16, 64
+
+;-----------------------------------------------------------------------------
+; void interp_4tap_vert_pp_%1x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal interp_4tap_vert_pp_8x2, 0, 7, 8
+mov r0, r0mp
+mov r1, r1mp
+mov r2, r2mp
+mov r3, r3mp
+mov r4d, r4m
+
+sub r0, r1
+movq m0, [r0]
+movq m1, [r0 + r1]
+movq m2, [r0 + 2 * r1]
+lea r5, [r0 + 2 * r1]
+movq m3, [r5 + r1]
+
+punpcklbw m0, m1
+punpcklbw m4, m2, m3
+
+%ifdef PIC
+lea r6, [tab_ChromaCoeff]
+movd m5, [r6 + r4 * 4]
+%else
+movd m5, [tab_ChromaCoeff + r4 * 4]
+%endif
+
+mova m6, [tab_Vm]
+pshufb m7, m5, m6
+pmaddubsw m0, m7
+
+mova m6, [tab_Vm + 16]
+pshufb m5, m6
+pmaddubsw m4, m5
+
+paddw m0, m4
+
+mova m6, [tab_c_512]
+
+pmulhrsw m0, m6
+packuswb m0, m0
+movh [r2], m0
+
+movq m4, [r0 + 4 * r1]
+
+punpcklbw m1, m2
+punpcklbw m3, m4
+
+pmaddubsw m1, m7
+pmaddubsw m3, m5
+
+paddw m1, m3
+
+pmulhrsw m1, m6
+packuswb m1, m1
+movh [r2 + r3], m1
+RET
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