[x265] [PATCH] asm: assembly code for pixel_sad_48x64

dnyaneshwar at multicorewareinc.com dnyaneshwar at multicorewareinc.com
Wed Oct 30 11:01:42 CET 2013


# HG changeset patch
# User Dnyaneshwar Gorade <dnyaneshwar at multicorewareinc.com>
# Date 1383127199 -19800
#      Wed Oct 30 15:29:59 2013 +0530
# Node ID eb7d9f928ee031a108b7c77e56f1d64f123d7157
# Parent  1f32144338f3399a962fddbaf2f261242128425c
asm: assembly code for pixel_sad_48x64

diff -r 1f32144338f3 -r eb7d9f928ee0 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Wed Oct 30 14:11:41 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp	Wed Oct 30 15:29:59 2013 +0530
@@ -251,6 +251,8 @@
         p.sad[LUMA_64x48]  = x265_pixel_sad_64x48_sse2;
         p.sad[LUMA_64x64]  = x265_pixel_sad_64x64_sse2;
 
+        p.sad[LUMA_48x64]  = x265_pixel_sad_48x64_sse2;
+
         ASSGN_SSE(sse2);
         INIT2(sad, _sse2);
         INIT2(sad_x3, _sse2);
diff -r 1f32144338f3 -r eb7d9f928ee0 source/common/x86/pixel.h
--- a/source/common/x86/pixel.h	Wed Oct 30 14:11:41 2013 +0530
+++ b/source/common/x86/pixel.h	Wed Oct 30 15:29:59 2013 +0530
@@ -51,6 +51,7 @@
     ret x265_pixel_ ## name ## _64x32_ ## suffix args; \
     ret x265_pixel_ ## name ## _64x48_ ## suffix args; \
     ret x265_pixel_ ## name ## _64x64_ ## suffix args; \
+    ret x265_pixel_ ## name ## _48x64_ ## suffix args; \
 
 #define DECL_X1(name, suffix) \
     DECL_PIXELS(int, name, suffix, (pixel *, intptr_t, pixel *, intptr_t))
diff -r 1f32144338f3 -r eb7d9f928ee0 source/common/x86/sad-a.asm
--- a/source/common/x86/sad-a.asm	Wed Oct 30 14:11:41 2013 +0530
+++ b/source/common/x86/sad-a.asm	Wed Oct 30 15:29:59 2013 +0530
@@ -173,6 +173,54 @@
     lea     r0,  [r0 + r1]
 %endmacro
 
+%macro PROCESS_SAD_48x4 0
+    movu    m1,  [r2]
+    movu    m2,  [r2 + 16]
+    movu    m3,  [r2 + 32]
+    psadbw  m1,  [r0]
+    psadbw  m2,  [r0 + 16]
+    psadbw  m3,  [r0 + 32]
+    paddd   m1,  m2
+    paddd   m0,  m1
+    paddd   m0,  m3
+    lea     r2,  [r2 + r3]
+    lea     r0,  [r0 + r1]
+
+    movu    m1,  [r2]
+    movu    m2,  [r2 + 16]
+    movu    m3,  [r2 + 32]
+    psadbw  m1,  [r0]
+    psadbw  m2,  [r0 + 16]
+    psadbw  m3,  [r0 + 32]
+    paddd   m1,  m2
+    paddd   m0,  m1
+    paddd   m0,  m3
+    lea     r2,  [r2 + r3]
+    lea     r0,  [r0 + r1]
+
+    movu    m1,  [r2]
+    movu    m2,  [r2 + 16]
+    movu    m3,  [r2 + 32]
+    psadbw  m1,  [r0]
+    psadbw  m2,  [r0 + 16]
+    psadbw  m3,  [r0 + 32]
+    paddd   m1,  m2
+    paddd   m0,  m1
+    paddd   m0,  m3
+    lea     r2,  [r2 + r3]
+    lea     r0,  [r0 + r1]
+
+    movu    m1,  [r2]
+    movu    m2,  [r2 + 16]
+    movu    m3,  [r2 + 32]
+    psadbw  m1,  [r0]
+    psadbw  m2,  [r0 + 16]
+    psadbw  m3,  [r0 + 32]
+    paddd   m1,  m2
+    paddd   m0,  m1
+    paddd   m0,  m3
+%endmacro
+
 %macro PROCESS_SAD_8x4 0
     movq        m1, [r2]
     movq        m2, [r2 + r3]
@@ -864,6 +912,36 @@
     movd    eax, m0
     RET
 
+;-----------------------------------------------------------------------------
+; int pixel_sad_48x64( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+cglobal pixel_sad_48x64, 4,4,5
+    pxor  m0,  m0
+    mov   r4,  64
+
+.loop
+    PROCESS_SAD_48x4
+    lea     r2,  [r2 + r3]
+    lea     r0,  [r0 + r1]
+
+    PROCESS_SAD_48x4
+    lea     r2,  [r2 + r3]
+    lea     r0,  [r0 + r1]
+
+    sub   r4,  8
+    cmp   r4,  8
+
+jnz .loop
+    PROCESS_SAD_48x4
+    lea   r2,  [r2 + r3]
+    lea   r0,  [r0 + r1]
+    PROCESS_SAD_48x4
+
+    movhlps m1,  m0
+    paddd   m0,  m1
+    movd    eax, m0
+    RET
+
 %endmacro
 
 INIT_XMM sse2


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