[x265] [PATCH] asm: assembly code for pixel_sad_24x32
dnyaneshwar at multicorewareinc.com
dnyaneshwar at multicorewareinc.com
Wed Oct 30 13:42:19 CET 2013
# HG changeset patch
# User Dnyaneshwar Gorade <dnyaneshwar at multicorewareinc.com>
# Date 1383136861 -19800
# Wed Oct 30 18:11:01 2013 +0530
# Node ID 62a51fe2fcbfd76fc8476a6f714f961b3f3f23ef
# Parent eb7d9f928ee031a108b7c77e56f1d64f123d7157
asm: assembly code for pixel_sad_24x32
diff -r eb7d9f928ee0 -r 62a51fe2fcbf source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Wed Oct 30 15:29:59 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp Wed Oct 30 18:11:01 2013 +0530
@@ -252,6 +252,7 @@
p.sad[LUMA_64x64] = x265_pixel_sad_64x64_sse2;
p.sad[LUMA_48x64] = x265_pixel_sad_48x64_sse2;
+ p.sad[LUMA_24x32] = x265_pixel_sad_24x32_sse2;
ASSGN_SSE(sse2);
INIT2(sad, _sse2);
diff -r eb7d9f928ee0 -r 62a51fe2fcbf source/common/x86/pixel.h
--- a/source/common/x86/pixel.h Wed Oct 30 15:29:59 2013 +0530
+++ b/source/common/x86/pixel.h Wed Oct 30 18:11:01 2013 +0530
@@ -52,6 +52,7 @@
ret x265_pixel_ ## name ## _64x48_ ## suffix args; \
ret x265_pixel_ ## name ## _64x64_ ## suffix args; \
ret x265_pixel_ ## name ## _48x64_ ## suffix args; \
+ ret x265_pixel_ ## name ## _24x32_ ## suffix args; \
#define DECL_X1(name, suffix) \
DECL_PIXELS(int, name, suffix, (pixel *, intptr_t, pixel *, intptr_t))
diff -r eb7d9f928ee0 -r 62a51fe2fcbf source/common/x86/sad-a.asm
--- a/source/common/x86/sad-a.asm Wed Oct 30 15:29:59 2013 +0530
+++ b/source/common/x86/sad-a.asm Wed Oct 30 18:11:01 2013 +0530
@@ -138,6 +138,44 @@
lea r0, [r0 + 2 * r1]
%endmacro
+%macro PROCESS_SAD_24x4 0
+ movu m1, [r2]
+ movq m2, [r2 + 16]
+ lea r2, [r2 + r3]
+ movu m3, [r2]
+ movq m4, [r2 + 16]
+ psadbw m1, [r0]
+ psadbw m3, [r0 + r1]
+ paddd m0, m1
+ paddd m0, m3
+ movq m1, [r0 + 16]
+ lea r0, [r0 + r1]
+ movq m3, [r0 + 16]
+ punpcklqdq m2, m4
+ punpcklqdq m1, m3
+ psadbw m2, m1
+ paddd m0, m2
+ lea r2, [r2 + r3]
+ lea r0, [r0 + r1]
+
+ movu m1, [r2]
+ movq m2, [r2 + 16]
+ lea r2, [r2 + r3]
+ movu m3, [r2]
+ movq m4, [r2 + 16]
+ psadbw m1, [r0]
+ psadbw m3, [r0 + r1]
+ paddd m0, m1
+ paddd m0, m3
+ movq m1, [r0 + 16]
+ lea r0, [r0 + r1]
+ movq m3, [r0 + 16]
+ punpcklqdq m2, m4
+ punpcklqdq m1, m3
+ psadbw m2, m1
+ paddd m0, m2
+%endmacro
+
%macro PROCESS_SAD_32x4 0
movu m1, [r2]
movu m2, [r2 + 16]
@@ -942,6 +980,33 @@
movd eax, m0
RET
+;-----------------------------------------------------------------------------
+; int pixel_sad_24x32( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+cglobal pixel_sad_24x32, 4,4,4
+ pxor m0, m0
+ mov r4, 32
+
+.loop
+ PROCESS_SAD_24x4
+ lea r2, [r2 + r3]
+ lea r0, [r0 + r1]
+ PROCESS_SAD_24x4
+ lea r2, [r2 + r3]
+ lea r0, [r0 + r1]
+ sub r4, 8
+ cmp r4, 8
+jnz .loop
+ PROCESS_SAD_24x4
+ lea r2, [r2 + r3]
+ lea r0, [r0 + r1]
+ PROCESS_SAD_24x4
+
+ movhlps m1, m0
+ paddd m0, m1
+ movd eax, m0
+ RET
+
%endmacro
INIT_XMM sse2
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