[x265] [PATCH] asm: assembly code for pixel_sad_12x16
Praveen Tiwari
praveen at multicorewareinc.com
Wed Oct 30 16:32:22 CET 2013
---------- Forwarded message ----------
From: <dnyaneshwar at multicorewareinc.com>
Date: Wed, Oct 30, 2013 at 7:47 PM
Subject: [x265] [PATCH] asm: assembly code for pixel_sad_12x16
To: x265-devel at videolan.org
# HG changeset patch
# User Dnyaneshwar Gorade <dnyaneshwar at multicorewareinc.com>
# Date 1383142575 -19800
# Wed Oct 30 19:46:15 2013 +0530
# Node ID 5037cc891114619e32ceeff332884d0abfd138fd
# Parent 62a51fe2fcbfd76fc8476a6f714f961b3f3f23ef
asm: assembly code for pixel_sad_12x16
diff -r 62a51fe2fcbf -r 5037cc891114 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Wed Oct 30 18:11:01 2013
+0530
+++ b/source/common/x86/asm-primitives.cpp Wed Oct 30 19:46:15 2013
+0530
@@ -253,6 +253,7 @@
p.sad[LUMA_48x64] = x265_pixel_sad_48x64_sse2;
p.sad[LUMA_24x32] = x265_pixel_sad_24x32_sse2;
+ p.sad[LUMA_12x16] = x265_pixel_sad_12x16_sse2;
ASSGN_SSE(sse2);
INIT2(sad, _sse2);
diff -r 62a51fe2fcbf -r 5037cc891114 source/common/x86/pixel.h
--- a/source/common/x86/pixel.h Wed Oct 30 18:11:01 2013 +0530
+++ b/source/common/x86/pixel.h Wed Oct 30 19:46:15 2013 +0530
@@ -53,6 +53,7 @@
ret x265_pixel_ ## name ## _64x64_ ## suffix args; \
ret x265_pixel_ ## name ## _48x64_ ## suffix args; \
ret x265_pixel_ ## name ## _24x32_ ## suffix args; \
+ ret x265_pixel_ ## name ## _12x16_ ## suffix args; \
#define DECL_X1(name, suffix) \
DECL_PIXELS(int, name, suffix, (pixel *, intptr_t, pixel *, intptr_t))
diff -r 62a51fe2fcbf -r 5037cc891114 source/common/x86/sad-a.asm
--- a/source/common/x86/sad-a.asm Wed Oct 30 18:11:01 2013 +0530
+++ b/source/common/x86/sad-a.asm Wed Oct 30 19:46:15 2013 +0530
@@ -31,8 +31,9 @@
SECTION_RODATA 32
+MSK: db
255,255,255,255,255,255,255,255,255,255,255,255,0,0,0,0
pb_shuf8x8c2: times 2 db 0,0,0,0,8,8,8,8,-1,-1,-1,-1,-1,-1,-1,-1
-hpred_shuf: db 0,0,2,2,8,8,10,10,1,1,3,3,9,9,11,11
+hpred_shuf: db 0,0,2,2,8,8,10,10,1,1,3,3,9,9,11,11
SECTION .text
@@ -119,6 +120,39 @@
RET
%endmacro
+%macro PROCESS_SAD_12x4 0
+ movu m1, [r2]
+ movu m2, [r0]
+ pand m1, m4
+ pand m2, m4
+ psadbw m1, m2
+ paddd m0, m1
+ lea r2, [r2 + r3]
+ lea r0, [r0 + r1]
+ movu m1, [r2]
+ movu m2, [r0]
+ pand m1, m4
+ pand m2, m4
+ psadbw m1, m2
+ paddd m0, m1
>>+ lea r2, [r2 + r3]
>>+ lea r0, [r0 + r1]
>>+ movu m1, [r2]
>>+ movu m2, [r0]
we don't need to load address every time when we are adding stride to it.
we should try to calculate address first using multiply by 1, 2, 4, or 8 if
it not the case then we should load it.
like above four instruction can be replaced with these two only.
movu m1, [r2 + 2 * r3]
movu m2, [r0 + 2 * r1]
+ pand m1, m4
+ pand m2, m4
+ psadbw m1, m2
+ paddd m0, m1
+ lea r2, [r2 + r3]
+ lea r0, [r0 + r1]
+ movu m1, [r2]
+ movu m2, [r0]
+ pand m1, m4
+ pand m2, m4
+ psadbw m1, m2
+ paddd m0, m1
+%endmacro
+
%macro PROCESS_SAD_16x4 0
movu m1, [r2]
movu m2, [r2 + r3]
@@ -1007,6 +1041,29 @@
movd eax, m0
RET
+;-----------------------------------------------------------------------------
+; int pixel_sad_12x16( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+cglobal pixel_sad_12x16, 4,4,4
+ mova m4, [MSK]
+ pxor m0, m0
+
+ PROCESS_SAD_12x4
+ lea r2, [r2 + r3]
+ lea r0, [r0 + r1]
+ PROCESS_SAD_12x4
+ lea r2, [r2 + r3]
+ lea r0, [r0 + r1]
+ PROCESS_SAD_12x4
+ lea r2, [r2 + r3]
+ lea r0, [r0 + r1]
+ PROCESS_SAD_12x4
+
+ movhlps m1, m0
+ paddd m0, m1
+ movd eax, m0
+ RET
+
%endmacro
overuse of lea instruction please eliminate them, use available registers
to save loads operations.
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