[x265] SSE2 Crash on SSE4-disabled CPU.

chen chenm003 at 163.com
Mon Apr 21 16:48:58 CEST 2014


Thank your report
PACKUSDW is SSE4.1 instruction, we will fix it soon.

At 2014-04-21 22:44:35,"dn c" <dncodr at gmail.com> wrote:
>Hi. Fisrt of all thanks for quick fix unaligned read.
>But I found one more crash, now its 10(16-bit ) x64-build. Correct me
>if i wrong, but only supported for high bit depth is 64-bit builds. So
>this time in SSE2 branch SSE4.1 instruction PACKUSDW.
>Here some log, stacktrace and disasm info.
>
>yuv  [info]: 320x240 fps 20000/1000 i420 frames 0 - 30 of 31
>[New Thread 1460.0x738]
>x265 [info]: HEVC encoder version +-
>x265 [info]: build info [Windows][GCC 4.8.2][64 bit] 16bpp
>x265 [info]: using cpu capabilities: MMX2 SSE2Fast SSSE3 Cache64
>[New Thread 1460.0x2c8]
>[New Thread 1460.0xb8]
>x265 [info]: WPP streams / pool / frames         : 4 / 2 / 1
>x265 [info]: Main10 profile, Level-2 (Main tier)
>x265 [info]: Internal bit depth                  : 10
>x265 [info]: CU size                             : 64
>x265 [info]: Max RQT depth inter / intra         : 1 / 1
>x265 [info]: ME / range / subpel / merge         : hex / 57 / 2 / 2
>x265 [info]: Keyframe min / max / scenecut       : 20 / 250 / 40
>x265 [info]: Lookahead / bframes / badapt        : 20 / 4 / 2
>x265 [info]: b-pyramid / weightp / weightb / refs: 1 / 1 / 0 / 3
>x265 [info]: Rate Control / AQ-Strength / CUTree : CRF-20.0 / 1.0 / 1
>x265 [info]: tools: rect amp rd=3 lft sao-lcu sign-hide
>[New Thread 1460.0x1ec]
>x265 [debug]: POC:0 I QP 38.40(25)     397752 bits [SSIM: 19.806dB]
>x265 [full]: poc: 4 weights: [L0:R0 Y{29/32+9}U{58/64-1}V{61/64+6}]
>x265 [debug]: POC:4 P QP 38.25(25)     360088 bits [SSIM: 15.483dB] [L0 0 ]
>=========================
>Program received signal SIGILL, Illegal instruction.
>[Switching to Thread 1460.0x2c8]
>0x0000000000525f20 in x265_interp_4tap_vert_sp_4x2_sse2 ()
>
>#0  0x0000000000525f20 in x265_interp_4tap_vert_sp_4x2_sse2 ()
>#1  0x00000000005b82dc in
>x265::TComPrediction::xPredInterUni(x265::TComDataCU*,unsigned int,
>int, int, int, x265::TComYuv*, bool, bool) ()
>#2  0x00000000005b9c30 in
>x265::TComPrediction::xPredInterBi(x265::TComDataCU*,unsigned int,
>int, int, x265::TComYuv*, bool, bool) ()
>#3  0x00000000005ba108 in
>x265::TComPrediction::motionCompensation(x265::TComDataCU*,
>x265::TComYuv*, int, int, bool, bool) ()
>#4  0x00000000005c47e8 in
>x265::TEncCu::xCompressInterCU(x265::TComDataCU*&, x265::TComDataCU*&,
>x265::TComDataCU*&, unsigned int, unsigned int, unsigned char)
>()
>=========================
>   0x0000000000525f0e <+126>:   paddd  %xmm4,%xmm0
>   0x0000000000525f12 <+130>:   paddd  %xmm4,%xmm1
>   0x0000000000525f16 <+134>:   psrad  $0xa,%xmm0
>   0x0000000000525f1b <+139>:   psrad  $0xa,%xmm1
>=> 0x0000000000525f20 <+144>:   packusdw %xmm1,%xmm0
>   0x0000000000525f25 <+149>:   pmaxsw %xmm6,%xmm0
>   0x0000000000525f29 <+153>:   pminsw %xmm5,%xmm0
>   0x0000000000525f2d <+157>:   movq   %xmm0,(%r8)
>   0x0000000000525f32 <+162>:   movhps %xmm0,(%r8,%r9,1)
>   0x0000000000525f37 <+167>:   movaps 0x8(%rsp),%xmm6
>   0x0000000000525f3c <+172>:   retq
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